GB1407222A - Electrically insulating layers - Google Patents

Electrically insulating layers

Info

Publication number
GB1407222A
GB1407222A GB4015772A GB4015772A GB1407222A GB 1407222 A GB1407222 A GB 1407222A GB 4015772 A GB4015772 A GB 4015772A GB 4015772 A GB4015772 A GB 4015772A GB 1407222 A GB1407222 A GB 1407222A
Authority
GB
United Kingdom
Prior art keywords
additive
semiconductor
oxide
minor part
layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB4015772A
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of GB1407222A publication Critical patent/GB1407222A/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02225Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/0223Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate
    • H01L21/02233Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer
    • H01L21/02236Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer group IV semiconductor
    • H01L21/02238Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer group IV semiconductor silicon in uncombined form, i.e. pure silicon
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02225Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/02255Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by thermal treatment
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/29Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
    • H01L23/291Oxides or nitrides or carbides, e.g. ceramics, glass
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02225Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02282Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process liquid deposition, e.g. spin-coating, sol-gel techniques, spray coating
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Formation Of Insulating Films (AREA)
  • Electrodes Of Semiconductors (AREA)

Abstract

1407222 Making semiconductor devices INTERNATIONAL BUSINESS MACHINES CORP 30 Aug 1972 [27 Sept 1971] 40157/72 Heading H1K An oxide layer is formed on an exposed surface of a silicon body by heating the body in an oxidizing atmosphere that includes, except if desired during the formation of a minor part of the thickness of the oxide layer immediately adjacent the silicon surface, sufficient additive such that at the temperature concerned, the layer, except the said minor part if present, is formed as a liquid and contains the additive as a dopant. The additive may comprise compounds of phosphorus and boron, which inhibit ion migration and which may be derived, for example, by adding POCl 3 or BBr 3 to the oxidizing atmosphere. The concentration of the additive in the oxide may be a few tenths of a mole per cent, but is preferably in the range 1À3 to 2À1 mole per cent. To prevent inversion at the semiconductor surface a minor part of the layer, e.g. 50Š, comprising the oxide without additive, is first formed on the semiconductor, or alternatively on opposite conductivity type additive may be added to compensate for any diffusion of the dopant into the semiconductor. In an example, chemically cleaned P-type Si wafers are preoxidized at 1000‹ C. in dry oxygen flowing at 800 cc. per minute for 4 minutes. The wafers are then exposed to a mixture of oxygen containing 0À8 parts per million POCl 8 for 19- 52 minutes. The resultant mixed SiO 2 -P 2 O 5 layers are formed as a liquid and may be 300- 500Š thick. The method may be used to form the gate insulation of an IGFET.
GB4015772A 1971-09-27 1972-08-30 Electrically insulating layers Expired GB1407222A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US18383371A 1971-09-27 1971-09-27

Publications (1)

Publication Number Publication Date
GB1407222A true GB1407222A (en) 1975-09-24

Family

ID=22674479

Family Applications (1)

Application Number Title Priority Date Filing Date
GB4015772A Expired GB1407222A (en) 1971-09-27 1972-08-30 Electrically insulating layers

Country Status (6)

Country Link
JP (1) JPS5338916B2 (en)
CA (1) CA974153A (en)
DE (1) DE2243285A1 (en)
FR (1) FR2154664B1 (en)
GB (1) GB1407222A (en)
IT (1) IT964137B (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2172746A (en) * 1985-03-23 1986-09-24 Stc Plc Formation of insulating films
US5458919A (en) * 1987-03-18 1995-10-17 Kabushiki Kaisha Toshiba Method for forming a film on a substrate by activating a reactive gas
EP1182706A2 (en) * 1991-08-28 2002-02-27 Advanced Power Technology Inc. IGBT process and device
EP1435666A2 (en) * 2002-12-10 2004-07-07 General Electric Company Avalanche photodiode for use in harsh environments

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2172746A (en) * 1985-03-23 1986-09-24 Stc Plc Formation of insulating films
GB2172746B (en) * 1985-03-23 1989-06-28 Stc Plc Improvements in integrated circuits
US5458919A (en) * 1987-03-18 1995-10-17 Kabushiki Kaisha Toshiba Method for forming a film on a substrate by activating a reactive gas
US5591486A (en) * 1987-03-18 1997-01-07 Kabushiki Kaisha Toshiba Method for forming a film on a substrate by activating a reactive gas
US5776557A (en) * 1987-03-18 1998-07-07 Kabushiki Kaisha Toshiba Method for forming a film on a substrate by activating a reactive gas
EP1182706A2 (en) * 1991-08-28 2002-02-27 Advanced Power Technology Inc. IGBT process and device
EP1182706A3 (en) * 1991-08-28 2003-10-08 Advanced Power Technology Inc. IGBT process and device
EP1435666A2 (en) * 2002-12-10 2004-07-07 General Electric Company Avalanche photodiode for use in harsh environments

Also Published As

Publication number Publication date
FR2154664A1 (en) 1973-05-11
JPS5338916B2 (en) 1978-10-18
JPS4842678A (en) 1973-06-21
FR2154664B1 (en) 1976-05-21
IT964137B (en) 1974-01-21
DE2243285A1 (en) 1973-04-05
CA974153A (en) 1975-09-09

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Legal Events

Date Code Title Description
PS Patent sealed [section 19, patents act 1949]
PCNP Patent ceased through non-payment of renewal fee