GB1231238A - - Google Patents

Info

Publication number
GB1231238A
GB1231238A GB1231238DA GB1231238A GB 1231238 A GB1231238 A GB 1231238A GB 1231238D A GB1231238D A GB 1231238DA GB 1231238 A GB1231238 A GB 1231238A
Authority
GB
United Kingdom
Prior art keywords
divider
output
outputs
group
digital data
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of GB1231238A publication Critical patent/GB1231238A/en
Expired legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/04Generating or distributing clock signals or signals derived directly therefrom
    • G06F1/12Synchronisation of different clock signals provided by a plurality of clock generators
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K23/00Pulse counters comprising counting chains; Frequency dividers comprising counting chains
    • H03K23/64Pulse counters comprising counting chains; Frequency dividers comprising counting chains with a base or radix other than a power of two
    • H03K23/66Pulse counters comprising counting chains; Frequency dividers comprising counting chains with a base or radix other than a power of two with a variable counting base, e.g. by presetting or by adding or suppressing pulses
    • H03K23/667Pulse counters comprising counting chains; Frequency dividers comprising counting chains with a base or radix other than a power of two with a variable counting base, e.g. by presetting or by adding or suppressing pulses by switching the base during a counting cycle
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00Arrangements for synchronising receiver with transmitter
    • H04L7/02Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/033Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop

Abstract

1,231,238. Automatic phase control. INTERNATIONAL BUSINESS MACHINES CORP. 21 Oct., 1968 [26 Oct., 1967], No. 49804/68. Heading H3A. A digital data receiver includes a clock source comprising: an oscillator 11 operating at a frequency greater than that of the received digital data; a divider 12 capable of dividing by any number selected from a range of numbers; and means for controlling the periods during which the divider divides by different numbers of the range, in accordance with the phase of the received digital data signal. As described, incoming data signals on line E are gated in 13 with pulses from the clock source 11, and the resulting output pulse is fed to detector 14 together with the outputs from the ten stages of divider 12. The divider outputs are arranged in three groups, 1, 2, 3; 4, 5, 6; 7,8,9,10 are detector 14 produces an output on one line if the pulse from unit 13 is co-incident with the first group, an output on another line if it is coincident with the third group, and no output if it is coincident with the second group. These outputs are fed to a forward and backward stepping counter 15, whose count is compared with that of counter 16, the latter counting the number of cycles made by divider 12. The result of the comparison produces a signal from 17 to actuate latch V 3 which switches the division factor of divider 12 between nine and ten.
GB1231238D 1967-10-26 1968-10-21 Expired GB1231238A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR6008763 1967-10-26

Publications (1)

Publication Number Publication Date
GB1231238A true GB1231238A (en) 1971-05-12

Family

ID=8970625

Family Applications (1)

Application Number Title Priority Date Filing Date
GB1231238D Expired GB1231238A (en) 1967-10-26 1968-10-21

Country Status (3)

Country Link
JP (1) JPS4823872B1 (en)
FR (1) FR1548605A (en)
GB (1) GB1231238A (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5326532Y2 (en) * 1972-02-14 1978-07-06
JPH01100920U (en) * 1987-12-25 1989-07-06

Also Published As

Publication number Publication date
DE1762874A1 (en) 1971-04-08
FR1548605A (en) 1968-12-06
JPS4823872B1 (en) 1973-07-17
DE1762874B2 (en) 1971-09-30

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Legal Events

Date Code Title Description
PS Patent sealed
PCNP Patent ceased through non-payment of renewal fee