GB1217323A - A method of interconnecting integrated circuits and interconnected circuits so produced - Google Patents

A method of interconnecting integrated circuits and interconnected circuits so produced

Info

Publication number
GB1217323A
GB1217323A GB433167A GB433167A GB1217323A GB 1217323 A GB1217323 A GB 1217323A GB 433167 A GB433167 A GB 433167A GB 433167 A GB433167 A GB 433167A GB 1217323 A GB1217323 A GB 1217323A
Authority
GB
United Kingdom
Prior art keywords
contacts
bases
base
pressure
indium
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB433167A
Inventor
Roger Percival Towell
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
EMI Ltd
Electrical and Musical Industries Ltd
Original Assignee
EMI Ltd
Electrical and Musical Industries Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by EMI Ltd, Electrical and Musical Industries Ltd filed Critical EMI Ltd
Priority to GB433167A priority Critical patent/GB1217323A/en
Publication of GB1217323A publication Critical patent/GB1217323A/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • H01L23/5385—Assembly of a plurality of insulating substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

1,217,323. Welding by pressure. ELECTRIC & MUSICAL INDUSTRIES Ltd. 29 Jan., 1968 [28 Jan., 1967], No. 4331/67. Heading B3R. [Also in Divisions H1 and H2] In providing electrical interconnections between integrated circuits mounted on respective bases, connections are made from each circuit to contacts arranged in lines on the respective base and contacts on one base are connected with contacts on another by cold pressure welds formed between soft metal provided on or as the contacts of the bases. A unit is formed by sticking, by an adhesive, an integrated circuit element 1 to the centre of a rectangular base 2 which carries contacts 3 arranged on diagonal lines on the frame. The contacts on the element 1 are connected to the contacts 3 by conductors 4 and the contacts which may be on both the upper and lower surfaces of the base are of indium or are provided with a blob of indium. Thirteen such bases are arranged in two layers, nine in the bottom layer and four in the top so that contacts in the adjacent layers are opposed. The upper bases are pressed down on to the lower base to cold pressure weld opposed contacts. Further contacts may be arranged on the edges of the bases to be welded by lateral pressure and a further base may be provided above the four top bases. The latter bases must have contacts on both upper and lower surfaces. A pattern recognition device as disclosed in Specification 1,192,554 may be formed by bases arranged in a truncated pyramid and joined in the manner described.
GB433167A 1967-01-28 1967-01-28 A method of interconnecting integrated circuits and interconnected circuits so produced Expired GB1217323A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
GB433167A GB1217323A (en) 1967-01-28 1967-01-28 A method of interconnecting integrated circuits and interconnected circuits so produced

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB433167A GB1217323A (en) 1967-01-28 1967-01-28 A method of interconnecting integrated circuits and interconnected circuits so produced

Publications (1)

Publication Number Publication Date
GB1217323A true GB1217323A (en) 1970-12-31

Family

ID=9775157

Family Applications (1)

Application Number Title Priority Date Filing Date
GB433167A Expired GB1217323A (en) 1967-01-28 1967-01-28 A method of interconnecting integrated circuits and interconnected circuits so produced

Country Status (1)

Country Link
GB (1) GB1217323A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0031240A2 (en) * 1979-12-18 1981-07-01 Fujitsu Limited An electrical component comprising semiconductor chips
CN102956616A (en) * 2011-08-08 2013-03-06 爱思开海力士有限公司 Semiconductor chip, packages, and method of fabricating semiconductor chip and packages

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0031240A2 (en) * 1979-12-18 1981-07-01 Fujitsu Limited An electrical component comprising semiconductor chips
EP0031240A3 (en) * 1979-12-18 1983-07-06 Fujitsu Limited An electrical component comprising semiconductor chips
CN102956616A (en) * 2011-08-08 2013-03-06 爱思开海力士有限公司 Semiconductor chip, packages, and method of fabricating semiconductor chip and packages

Similar Documents

Publication Publication Date Title
US4145120A (en) Electronic table calculator using liquid crystal display
FR2107213A5 (en)
US5586892A (en) Electrically connecting structure
CN106847801A (en) A kind of surface-adhered type RGB LED encapsulation modules and its manufacture method
ATE61696T1 (en) INTEGRATED CIRCUIT ARRANGEMENT WITH STACKED CONDUCTOR LAYERS FOR CONNECTING CIRCUIT ELEMENTS.
GB1282326A (en) Method of connecting electrical conductors
WO2001020686A8 (en) Two-terminal cell-interconnected-circuits using mechanically-stacked photovoltaic cells for line-focus concentrator arrays
GB988075A (en) Improvements relating to semiconductor circuit assemblies
GB1198257A (en) Improvements in Methods of Bonding Electrical Conductors
CN109817769A (en) A kind of Novel LED chip encapsulation manufacturing method
GB1217323A (en) A method of interconnecting integrated circuits and interconnected circuits so produced
GB1152809A (en) Electric Circuit Assembly
US2872565A (en) Welding method
JPS5720448A (en) Semiconductor integrated circuit device
JP3010924B2 (en) Semiconductor device
JPS61114226A (en) Liquid-crystal display element
GB1315510A (en) Fabrication of electrical circuit devices
GB1430640A (en) Printed circuits and their manufacture
JPS55124248A (en) Leadless package
FR1599198A (en)
JPS62291156A (en) Hybrid integrated circuit device
JPS6276753A (en) Semiconductor device and manufacture thereof
JPS57109358A (en) Hybrid integrated circuit device
GB1239678A (en)
JPH02213148A (en) Tape carrier