GB1208996A - Improvements in or relating to interference suppressing circuit arrangements - Google Patents
Improvements in or relating to interference suppressing circuit arrangementsInfo
- Publication number
- GB1208996A GB1208996A GB1584569A GB1584569A GB1208996A GB 1208996 A GB1208996 A GB 1208996A GB 1584569 A GB1584569 A GB 1584569A GB 1584569 A GB1584569 A GB 1584569A GB 1208996 A GB1208996 A GB 1208996A
- Authority
- GB
- United Kingdom
- Prior art keywords
- output
- relating
- circuit arrangements
- suppressing circuit
- interference suppressing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B3/00—Line transmission systems
- H04B3/02—Details
- H04B3/32—Reducing cross-talk, e.g. by compensating
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
- H03K3/027—Generators characterised by the type of circuit or by the means used for producing pulses by the use of logic circuits, with internal or external positive feedback
- H03K3/037—Bistable circuits
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Logic Circuits (AREA)
- Dc Digital Transmission (AREA)
Abstract
1,208,996. Transistor logic circuits. TELEFUNKEN PATENTVERWERTUNGSG.m.b.H. 26 March, 1969 [23 April, 1968], No. 15845/69. Heading H3T. Two bi-stable circuits FF1, FF2 in cascade between input terminals L, L<SP>1</SP> and output terminals A1, A2 are responsive only to complementary input signals (i.e. 0, 1 or 1, 0), the output at A1, A2 being unchanged by in-phase unidirectional signals (i.e. 0, 0 or 1, 1). Each bi-stable is formed of two cross-coupled NAND gates. If, for example, both L, L<SP>1</SP> become 1, then there is no change in FF1 output; if L, L<SP>1</SP> become 0 then FF1 output becomes 1, 1, and thus FF2 produces no change of output, FF1 returning to the original state when the 0, 0 inputs are replaced by the original complementary input at L, L<SP>1</SP>.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US22237A US3660893A (en) | 1969-03-26 | 1970-03-24 | Replaceable blade unit for a safety razor |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE19681762159 DE1762159A1 (en) | 1968-04-23 | 1968-04-23 | Arrangement to suppress interference pulses |
Publications (1)
Publication Number | Publication Date |
---|---|
GB1208996A true GB1208996A (en) | 1970-10-14 |
Family
ID=5696889
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB1584569A Expired GB1208996A (en) | 1968-04-23 | 1969-03-26 | Improvements in or relating to interference suppressing circuit arrangements |
Country Status (2)
Country | Link |
---|---|
DE (1) | DE1762159A1 (en) |
GB (1) | GB1208996A (en) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4524291A (en) * | 1983-01-06 | 1985-06-18 | Motorola, Inc. | Transition detector circuit |
-
1968
- 1968-04-23 DE DE19681762159 patent/DE1762159A1/en active Pending
-
1969
- 1969-03-26 GB GB1584569A patent/GB1208996A/en not_active Expired
Also Published As
Publication number | Publication date |
---|---|
DE1762159A1 (en) | 1970-04-30 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
PS | Patent sealed | ||
PLNP | Patent lapsed through nonpayment of renewal fees |