GB1149165A - Electronic readout gate circuit for reading a logic memory element - Google Patents
Electronic readout gate circuit for reading a logic memory elementInfo
- Publication number
- GB1149165A GB1149165A GB26997/67A GB2699767A GB1149165A GB 1149165 A GB1149165 A GB 1149165A GB 26997/67 A GB26997/67 A GB 26997/67A GB 2699767 A GB2699767 A GB 2699767A GB 1149165 A GB1149165 A GB 1149165A
- Authority
- GB
- United Kingdom
- Prior art keywords
- transistor
- transistors
- stored
- output
- memory element
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 229920006395 saturated elastomer Polymers 0.000 abstract 1
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C15/00—Digital stores in which information comprising one or more characteristic parts is written into the store and in which information is read-out by searching for one or more of these characteristic parts, i.e. associative or content-addressed stores
- G11C15/04—Digital stores in which information comprising one or more characteristic parts is written into the store and in which information is read-out by searching for one or more of these characteristic parts, i.e. associative or content-addressed stores using semiconductor elements
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
- H03K19/082—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using bipolar transistors
- H03K19/086—Emitter coupled logic
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
- H03K19/082—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using bipolar transistors
- H03K19/086—Emitter coupled logic
- H03K19/0866—Stacked emitter coupled logic
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Static Random-Access Memory (AREA)
- Logic Circuits (AREA)
- Electronic Switches (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US47217765A | 1965-07-15 | 1965-07-15 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| GB1149165A true GB1149165A (en) | 1969-04-16 |
Family
ID=23874486
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| GB26997/67A Expired GB1149165A (en) | 1965-07-15 | 1966-06-16 | Electronic readout gate circuit for reading a logic memory element |
Country Status (4)
| Country | Link |
|---|---|
| US (1) | US3422283A (enExample) |
| DE (1) | DE1288138B (enExample) |
| GB (1) | GB1149165A (enExample) |
| NL (1) | NL6608918A (enExample) |
Families Citing this family (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3550040A (en) * | 1968-05-31 | 1970-12-22 | Monsanto Co | Double-balanced modulator circuit readily adaptable to integrated circuit fabrication |
| US3641511A (en) * | 1970-02-06 | 1972-02-08 | Westinghouse Electric Corp | Complementary mosfet integrated circuit memory |
| CA917756A (en) * | 1971-11-08 | 1972-12-26 | E. Lim Koang | Universal active lattice network |
| US3760190A (en) * | 1972-06-29 | 1973-09-18 | Ibm | Non-current summing multiple input latching circuit |
| US4833421A (en) * | 1987-10-19 | 1989-05-23 | International Business Machines Corporation | Fast one out of many differential multiplexer |
| US5910737A (en) * | 1997-06-30 | 1999-06-08 | Delco Electronics Corporation | Input buffer circuit with differential input thresholds operable with high common mode input voltages |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE1196241B (de) * | 1963-06-12 | 1965-07-08 | Standard Elektrik Lorenz Ag | Mit Stromuebernahme arbeitende Schaltungs-anordnung zur Durchfuehrung logischer Operationen |
-
1965
- 1965-07-15 US US472177A patent/US3422283A/en not_active Expired - Lifetime
-
1966
- 1966-06-16 GB GB26997/67A patent/GB1149165A/en not_active Expired
- 1966-06-27 NL NL6608918A patent/NL6608918A/xx unknown
- 1966-07-14 DE DEM70227A patent/DE1288138B/de active Pending
Also Published As
| Publication number | Publication date |
|---|---|
| NL6608918A (enExample) | 1967-01-16 |
| DE1288138B (de) | 1969-01-30 |
| US3422283A (en) | 1969-01-14 |
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