GB1102465A - Logic module - Google Patents

Abstract

1,102,465. Counters; programming devices. INTERNATIONAL STANDARD ELECTRIC CORPORATION. 24 Jan., 1966 [27 Jan., 1965], No. 3132/66. Heading G4A. A circuit unit or module, Fig. 2, comprises bi-stable storage elements Sp (which may be transistor triggers, as in Fig. 3, not shown), a decoder D which converts a combination of input markings into a corresponding marking on a single one of its output terminals dl to dn, a coder C inverse to the decoder D, and delay units V. According to the Specification this combination of logical units is particularly useful and as examples of its use two counters and a programming device are described. To form a counter with both a binary output and a one-out-of-n output, the decoder outputs are connected to the coder input in staggered relationship, dr to c(r + 1), and the outputs of the delays V are connected to the inputs of the storage devices Sp via switches S. Thus whenever a number x is registered in the storage devices Sp, a number x + 1 is produced at the outputs of the coder C. Momentary closure of the switches S, for a period shorter than the delays V, then transfers the number x + 1 to the storage devices thus effecting a counting action. By using different connections between the decoder and the coder (details given in the Specification) a 2-out-of-5 modulus 10 counter can be formed. With other connections an arbitrary sequence of bit combinations can be produced by successive closures of the switches S.