GB1074250A - Method and circuit arrangement to identify faults in translators - Google Patents

Method and circuit arrangement to identify faults in translators

Info

Publication number
GB1074250A
GB1074250A GB5052664A GB5052664A GB1074250A GB 1074250 A GB1074250 A GB 1074250A GB 5052664 A GB5052664 A GB 5052664A GB 5052664 A GB5052664 A GB 5052664A GB 1074250 A GB1074250 A GB 1074250A
Authority
GB
United Kingdom
Prior art keywords
translators
translator
circuit arrangement
identify faults
dec
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB5052664A
Other languages
English (en)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STC PLC
Original Assignee
Standard Telephone and Cables PLC
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Standard Telephone and Cables PLC filed Critical Standard Telephone and Cables PLC
Publication of GB1074250A publication Critical patent/GB1074250A/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q3/00—Selecting arrangements
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
    • H03K17/80—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used using non-linear magnetic devices; using non-linear dielectric devices
    • H03K17/81—Switching arrangements with several input- or output-terminals, e.g. multiplexers, distributors
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/14—Error detection or correction of the data by redundancy in operation
    • G06F11/1497—Details of time redundant execution on a single processing unit

Landscapes

  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Monitoring And Testing Of Exchanges (AREA)
  • Manipulation Of Pulses (AREA)
GB5052664A 1963-12-14 1964-12-11 Method and circuit arrangement to identify faults in translators Expired GB1074250A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DEST21464A DE1224779B (de) 1963-12-14 1963-12-14 Verfahren und Schaltungsanordnung zur Fehlererkennung bei Zuordnern

Publications (1)

Publication Number Publication Date
GB1074250A true GB1074250A (en) 1967-07-05

Family

ID=7459015

Family Applications (1)

Application Number Title Priority Date Filing Date
GB5052664A Expired GB1074250A (en) 1963-12-14 1964-12-11 Method and circuit arrangement to identify faults in translators

Country Status (2)

Country Link
DE (1) DE1224779B (de)
GB (1) GB1074250A (de)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3646519A (en) * 1970-02-02 1972-02-29 Burroughs Corp Method and apparatus for testing logic functions in a multiline data communication system

Also Published As

Publication number Publication date
DE1224779B (de) 1966-09-15

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