GB1066911A - Semiconductor devices - Google Patents

Semiconductor devices

Info

Publication number
GB1066911A
GB1066911A GB58/65A GB5865A GB1066911A GB 1066911 A GB1066911 A GB 1066911A GB 58/65 A GB58/65 A GB 58/65A GB 5865 A GB5865 A GB 5865A GB 1066911 A GB1066911 A GB 1066911A
Authority
GB
United Kingdom
Prior art keywords
wafer
layer
semi
etching
holes
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB58/65A
Other languages
English (en)
Inventor
Roger Cullis
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STC PLC
Original Assignee
Standard Telephone and Cables PLC
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Standard Telephone and Cables PLC filed Critical Standard Telephone and Cables PLC
Priority to GB58/65A priority Critical patent/GB1066911A/en
Priority to US494350A priority patent/US3428499A/en
Priority to DE19651514073 priority patent/DE1514073B2/de
Priority to NL6517226A priority patent/NL6517226A/xx
Publication of GB1066911A publication Critical patent/GB1066911A/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/20—Dry etching; Plasma etching; Reactive-ion etching
    • H10P50/24—Dry etching; Plasma etching; Reactive-ion etching of semiconductor materials
    • H10P50/242—Dry etching; Plasma etching; Reactive-ion etching of semiconductor materials of Group IV materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/01—Manufacture or treatment
    • H10W10/011—Manufacture or treatment of isolation regions comprising dielectric materials
    • H10W10/018—Manufacture or treatment of isolation regions comprising dielectric materials using selective deposition of crystalline silicon, e.g. using epitaxial growth of silicon
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/01—Manufacture or treatment
    • H10W10/011—Manufacture or treatment of isolation regions comprising dielectric materials
    • H10W10/019—Manufacture or treatment of isolation regions comprising dielectric materials using epitaxial passivated integrated circuit [EPIC] processes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/10—Isolation regions comprising dielectric materials
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/051—Etching
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/085—Isolated-integrated
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/102—Mask alignment
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/977—Thinning or removal of substrate

Landscapes

  • Mechanical Treatment Of Semiconductor (AREA)
  • Pressure Sensors (AREA)
  • Recrystallisation Techniques (AREA)
GB58/65A 1965-01-01 1965-01-01 Semiconductor devices Expired GB1066911A (en)

Priority Applications (4)

Application Number Priority Date Filing Date Title
GB58/65A GB1066911A (en) 1965-01-01 1965-01-01 Semiconductor devices
US494350A US3428499A (en) 1965-01-01 1965-10-11 Semiconductor process including reduction of the substrate thickness
DE19651514073 DE1514073B2 (de) 1965-01-01 1965-12-11 Verfahren zum Verringern der Dicke einer Schicht eines mehrschichtigen Halb leiterkorpers
NL6517226A NL6517226A (https=) 1965-01-01 1965-12-31

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB58/65A GB1066911A (en) 1965-01-01 1965-01-01 Semiconductor devices

Publications (1)

Publication Number Publication Date
GB1066911A true GB1066911A (en) 1967-04-26

Family

ID=9697659

Family Applications (1)

Application Number Title Priority Date Filing Date
GB58/65A Expired GB1066911A (en) 1965-01-01 1965-01-01 Semiconductor devices

Country Status (4)

Country Link
US (1) US3428499A (https=)
DE (1) DE1514073B2 (https=)
GB (1) GB1066911A (https=)
NL (1) NL6517226A (https=)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0547677A3 (en) * 1991-12-17 1996-10-16 Philips Nv Use of vapor-phase etching in fabrication of semiconductor-on-insulator structure

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1421766A (en) * 1972-03-21 1976-01-21 Ici Ltd Salicylaldoximes and their use in metal extraction processes
GB1520925A (en) * 1975-10-06 1978-08-09 Mullard Ltd Semiconductor device manufacture
US4321747A (en) * 1978-05-30 1982-03-30 Tokyo Shibaura Denki Kabushiki Kaisha Method of manufacturing a solid-state image sensing device
US5294808A (en) * 1992-10-23 1994-03-15 Cornell Research Foundation, Inc. Pseudomorphic and dislocation free heteroepitaxial structures
RU2102817C1 (ru) * 1993-03-02 1998-01-20 Арендное предприятие "Кремний" Способ изготовления полупроводниковых структур
US6033489A (en) * 1998-05-29 2000-03-07 Fairchild Semiconductor Corp. Semiconductor substrate and method of making same
US6927073B2 (en) * 2002-05-16 2005-08-09 Nova Research, Inc. Methods of fabricating magnetoresistive memory devices

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL268294A (https=) * 1960-10-10
DE1258983B (de) * 1961-12-05 1968-01-18 Telefunken Patent Verfahren zum Herstellen einer Halbleiteranordnung mit epitaktischer Schicht und mindestens einem pn-UEbergang
US3320485A (en) * 1964-03-30 1967-05-16 Trw Inc Dielectric isolation for monolithic circuit
US3312879A (en) * 1964-07-29 1967-04-04 North American Aviation Inc Semiconductor structure including opposite conductivity segments
NL133717C (https=) * 1965-06-28 1900-01-01

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0547677A3 (en) * 1991-12-17 1996-10-16 Philips Nv Use of vapor-phase etching in fabrication of semiconductor-on-insulator structure

Also Published As

Publication number Publication date
US3428499A (en) 1969-02-18
DE1514073B2 (de) 1971-01-21
DE1514073A1 (de) 1969-06-12
NL6517226A (https=) 1966-07-04

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