GB0308168D0 - Receiver having DC offset voltage correction - Google Patents
Receiver having DC offset voltage correctionInfo
- Publication number
- GB0308168D0 GB0308168D0 GBGB0308168.4A GB0308168A GB0308168D0 GB 0308168 D0 GB0308168 D0 GB 0308168D0 GB 0308168 A GB0308168 A GB 0308168A GB 0308168 D0 GB0308168 D0 GB 0308168D0
- Authority
- GB
- United Kingdom
- Prior art keywords
- receiver
- offset voltage
- voltage correction
- correction
- offset
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Ceased
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/06—Receivers
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
- H04L25/06—DC level restoring means; Bias distortion correction ; Decision circuits providing symbol by symbol detection
- H04L25/061—DC level restoring means; Bias distortion correction ; Decision circuits providing symbol by symbol detection providing hard decisions only; arrangements for tracking or suppressing unwanted low frequency components, e.g. removal of DC offset
- H04L25/063—Setting decision thresholds using feedback techniques only
- H04L25/064—Subtraction of the threshold from the signal, which is then compared to a supplementary fixed threshold
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/06—Receivers
- H04B1/16—Circuits
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Power Engineering (AREA)
- Dc Digital Transmission (AREA)
- Circuits Of Receivers In General (AREA)
- Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
Priority Applications (8)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| GBGB0308168.4A GB0308168D0 (en) | 2003-04-09 | 2003-04-09 | Receiver having DC offset voltage correction |
| JP2006506442A JP2006523059A (ja) | 2003-04-09 | 2004-03-30 | 直流オフセット電圧補正部を有する受信機 |
| PCT/IB2004/001045 WO2004091160A1 (en) | 2003-04-09 | 2004-03-30 | Receiver having dc offset voltage correction |
| EP04724331A EP1616421A1 (en) | 2003-04-09 | 2004-03-30 | Receiver having dc offset voltage correction |
| KR1020057019079A KR20060002953A (ko) | 2003-04-09 | 2004-03-30 | 복조 신호의 dc 오프셋 전압 수정 방법 및 수신기 |
| US10/552,227 US20070177692A1 (en) | 2003-04-09 | 2004-03-30 | Receiver having dc offset voltage correction |
| CNA2004800091490A CN1768515A (zh) | 2003-04-09 | 2004-03-30 | 具有dc偏移电压校正的接收机 |
| TW093109531A TW200501602A (en) | 2003-04-09 | 2004-04-06 | Receiver having DC offset voltage correction |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| GBGB0308168.4A GB0308168D0 (en) | 2003-04-09 | 2003-04-09 | Receiver having DC offset voltage correction |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| GB0308168D0 true GB0308168D0 (en) | 2003-05-14 |
Family
ID=9956462
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| GBGB0308168.4A Ceased GB0308168D0 (en) | 2003-04-09 | 2003-04-09 | Receiver having DC offset voltage correction |
Country Status (8)
| Country | Link |
|---|---|
| US (1) | US20070177692A1 (https=) |
| EP (1) | EP1616421A1 (https=) |
| JP (1) | JP2006523059A (https=) |
| KR (1) | KR20060002953A (https=) |
| CN (1) | CN1768515A (https=) |
| GB (1) | GB0308168D0 (https=) |
| TW (1) | TW200501602A (https=) |
| WO (1) | WO2004091160A1 (https=) |
Families Citing this family (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8195096B2 (en) | 2006-07-13 | 2012-06-05 | Mediatek Inc. | Apparatus and method for enhancing DC offset correction speed of a radio device |
| TWI330026B (en) * | 2007-04-02 | 2010-09-01 | Realtek Semiconductor Corp | Receiving system and related method for calibrating dc offset |
| CN101453229B (zh) * | 2007-11-28 | 2013-07-03 | 瑞昱半导体股份有限公司 | 用以校正直流偏移的接收系统及其相关方法 |
| JP2013222402A (ja) * | 2012-04-18 | 2013-10-28 | Nippon Reliance Kk | オフセット調整回路及びプログラム |
| JP6939660B2 (ja) * | 2018-03-13 | 2021-09-22 | トヨタ自動車株式会社 | 車両走行制御システム |
Family Cites Families (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0503728B1 (en) * | 1991-03-15 | 1997-08-27 | Koninklijke Philips Electronics N.V. | Data receiver comprising a control loop with reduced sampling frequency |
| GB2274759B (en) * | 1993-02-02 | 1996-11-13 | Nokia Mobile Phones Ltd | Correction of D.C offset in received and demodulated radio signals |
| US5724653A (en) * | 1994-12-20 | 1998-03-03 | Lucent Technologies Inc. | Radio receiver with DC offset correction circuit |
| EP0863606B1 (en) * | 1997-03-05 | 2003-09-24 | Nec Corporation | Direct conversion receiver capable of cancelling DC offset voltages |
| TW405314B (en) * | 1998-08-28 | 2000-09-11 | Ind Tech Res Inst | Device for eliminating DC offset utilizing noise regulation technique and its method |
| GB2349313A (en) * | 1999-04-21 | 2000-10-25 | Ericsson Telefon Ab L M | Radio receiver |
| US6275087B1 (en) * | 1999-11-16 | 2001-08-14 | Lsi Logic Corporation | Adaptive cancellation of time variant DC offset |
| GB0100202D0 (en) * | 2001-01-04 | 2001-02-14 | Koninkl Philips Electronics Nv | Receiver having a variable threshold slicer stage and a method of updating the threshold levels of the slicer stage |
| DE10251288B4 (de) * | 2002-11-04 | 2005-08-11 | Advanced Micro Devices, Inc., Sunnyvale | Equalizerschaltung mit Kerbkompensation für einen Direktmischempfänger |
-
2003
- 2003-04-09 GB GBGB0308168.4A patent/GB0308168D0/en not_active Ceased
-
2004
- 2004-03-30 WO PCT/IB2004/001045 patent/WO2004091160A1/en not_active Ceased
- 2004-03-30 US US10/552,227 patent/US20070177692A1/en not_active Abandoned
- 2004-03-30 EP EP04724331A patent/EP1616421A1/en not_active Withdrawn
- 2004-03-30 JP JP2006506442A patent/JP2006523059A/ja not_active Withdrawn
- 2004-03-30 CN CNA2004800091490A patent/CN1768515A/zh active Pending
- 2004-03-30 KR KR1020057019079A patent/KR20060002953A/ko not_active Withdrawn
- 2004-04-06 TW TW093109531A patent/TW200501602A/zh unknown
Also Published As
| Publication number | Publication date |
|---|---|
| US20070177692A1 (en) | 2007-08-02 |
| WO2004091160A1 (en) | 2004-10-21 |
| TW200501602A (en) | 2005-01-01 |
| EP1616421A1 (en) | 2006-01-18 |
| KR20060002953A (ko) | 2006-01-09 |
| CN1768515A (zh) | 2006-05-03 |
| JP2006523059A (ja) | 2006-10-05 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| AT | Applications terminated before publication under section 16(1) |