FR3129011B1 - Multiplication - Google Patents

Multiplication Download PDF

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Publication number
FR3129011B1
FR3129011B1 FR2111958A FR2111958A FR3129011B1 FR 3129011 B1 FR3129011 B1 FR 3129011B1 FR 2111958 A FR2111958 A FR 2111958A FR 2111958 A FR2111958 A FR 2111958A FR 3129011 B1 FR3129011 B1 FR 3129011B1
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FR
France
Prior art keywords
mask
multiplication
masked
data
replaced
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
FR2111958A
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English (en)
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FR3129011A1 (fr
Inventor
Thomas Sarno
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics Rousset SAS
Original Assignee
STMicroelectronics Rousset SAS
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication date
Application filed by STMicroelectronics Rousset SAS filed Critical STMicroelectronics Rousset SAS
Priority to FR2111958A priority Critical patent/FR3129011B1/fr
Priority to US17/981,191 priority patent/US20230111089A1/en
Publication of FR3129011A1 publication Critical patent/FR3129011A1/fr
Application granted granted Critical
Publication of FR3129011B1 publication Critical patent/FR3129011B1/fr
Active legal-status Critical Current
Anticipated expiration legal-status Critical

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Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/76—Arrangements for rearranging, permuting or selecting data according to predetermined rules, independently of the content of the data
    • G06F7/764—Masking
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/52—Multiplying; Dividing
    • G06F7/523—Multiplying only
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/491—Computations with decimal numbers radix 12 or 20.
    • G06F7/498—Computations with decimal numbers radix 12 or 20. using counter-type accumulators
    • G06F7/4983—Multiplying; Dividing
    • G06F7/4988—Multiplying; Dividing by table look-up
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2207/00—Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F2207/72—Indexing scheme relating to groups G06F7/72 - G06F7/729
    • G06F2207/7219—Countermeasures against side channel or fault attacks
    • G06F2207/7223—Randomisation as countermeasure against side channel attacks
    • G06F2207/7233—Masking, e.g. (A**e)+r mod n
    • G06F2207/7238—Operand masking, i.e. message blinding, e.g. (A+r)**e mod n; k.(P+R)
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L2209/00—Additional information or applications relating to cryptographic mechanisms or cryptographic arrangements for secret or secure communication H04L9/00
    • H04L2209/04—Masking or blinding

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Computational Mathematics (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Telephonic Communication Services (AREA)
  • Amplitude Modulation (AREA)
  • Amplifiers (AREA)
  • Image Processing (AREA)

Abstract

Multiplication La présente description concerne une opération de multiplication (250) d'une première donnée masquée (A' ; a') avec un premier masque (MA) et d'une deuxième donnée masquée (B' ; b') avec un deuxième masque (MB), dans laquelle : - le premier masque (MA) est remplacé par un troisième masque (RA), et le deuxième masque est remplacé par un quatrième masque (RB) ; - l'opération de multiplication (250) comprenant au moins une première opération de compensation mise en oeuvre par au moins une première table de correspondance ; et - la donnée résultat (C') de ladite opération de multiplication (250) est une troisième donnée correspondant à la multiplication de la première donnée démasquée (A) et de la deuxième donnée démasquée (B) masquée avec un cinquième masque (MC) indépendant des premier, deuxième, troisième, et quatrième masques (MA, MB, RA, RB). Figure pour l'abrégé : Fig. 3
FR2111958A 2021-10-11 2021-11-10 Multiplication Active FR3129011B1 (fr)

Priority Applications (2)

Application Number Priority Date Filing Date Title
FR2111958A FR3129011B1 (fr) 2021-11-10 2021-11-10 Multiplication
US17/981,191 US20230111089A1 (en) 2021-10-11 2022-11-04 Multiplication

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR2111958 2021-11-10
FR2111958A FR3129011B1 (fr) 2021-11-10 2021-11-10 Multiplication

Publications (2)

Publication Number Publication Date
FR3129011A1 FR3129011A1 (fr) 2023-05-12
FR3129011B1 true FR3129011B1 (fr) 2023-11-10

Family

ID=80933515

Family Applications (1)

Application Number Title Priority Date Filing Date
FR2111958A Active FR3129011B1 (fr) 2021-10-11 2021-11-10 Multiplication

Country Status (2)

Country Link
US (1) US20230111089A1 (fr)
FR (1) FR3129011B1 (fr)

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10201443B4 (de) * 2002-01-16 2004-08-12 Infineon Technologies Ag Carry-Save-Multiplizierer für verschlüsselte Daten
FR3101980B1 (fr) * 2019-10-11 2021-12-10 St Microelectronics Grenoble 2 Processeur

Also Published As

Publication number Publication date
US20230111089A1 (en) 2023-04-13
FR3129011A1 (fr) 2023-05-12

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