FR3094561B1 - Procédé de fabrication d’une structure - Google Patents

Procédé de fabrication d’une structure Download PDF

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Publication number
FR3094561B1
FR3094561B1 FR1903041A FR1903041A FR3094561B1 FR 3094561 B1 FR3094561 B1 FR 3094561B1 FR 1903041 A FR1903041 A FR 1903041A FR 1903041 A FR1903041 A FR 1903041A FR 3094561 B1 FR3094561 B1 FR 3094561B1
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France
Prior art keywords
face
contour
front face
manufacturing process
main face
Prior art date
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Application number
FR1903041A
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English (en)
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FR3094561A1 (fr
Inventor
Panqueva Nohora-Lizeth Caicedo
Abdenacer Ait-Mani
Guillaume Nonglaton
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Commissariat a lEnergie Atomique et aux Energies Alternatives CEA
Original Assignee
Commissariat a lEnergie Atomique CEA
Commissariat a lEnergie Atomique et aux Energies Alternatives CEA
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Application filed by Commissariat a lEnergie Atomique CEA, Commissariat a lEnergie Atomique et aux Energies Alternatives CEA filed Critical Commissariat a lEnergie Atomique CEA
Priority to FR1903041A priority Critical patent/FR3094561B1/fr
Priority to EP20726189.2A priority patent/EP3915139A1/fr
Priority to US17/441,879 priority patent/US20220189910A1/en
Priority to PCT/FR2020/050531 priority patent/WO2020193903A1/fr
Priority to TW109109812A priority patent/TWI840537B/zh
Publication of FR3094561A1 publication Critical patent/FR3094561A1/fr
Application granted granted Critical
Publication of FR3094561B1 publication Critical patent/FR3094561B1/fr
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    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
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    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/563—Encapsulation of active face of flip-chip device, e.g. underfilling or underencapsulation of flip-chip, encapsulation preform on chip or mounting substrate
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    • H01L23/293—Organic, e.g. plastic
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    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
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    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
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    • H01L24/73—Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
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    • H01L2924/0665—Epoxy resin

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  • Engineering & Computer Science (AREA)
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  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Micromachines (AREA)
  • Electroluminescent Light Sources (AREA)

Abstract

L’invention concerne un procédé de fabrication d’une structure comprenant les étapes suivantes :a) une étape de fourniture d’un élément actif pourvu d’une face avant et arrière (120) reliées par un contour (130) ;c) une étape d’assemblage de la face avant et d’une face principale (210) d’un support (200) ;e) une étape de remplissage d’un espace d’interconnexions entre la face avant (110) et la face principale (210), avec une colle (500) ;le procédé étant caractérisé en ce qu’il comprend en outre une étape b), exécutée avant l’étape c), de formation, par une méthode autre qu’un procédé plasma, d’une première couche de passivation recouvrant le contour (130), et faite d’un premier composé permettant de limiter le mouillage dudit contour (130) par la colle (500) au regard de la face avant et de la face principale (210). Figure pour l’abrégé : figure 5g.
FR1903041A 2019-03-25 2019-03-25 Procédé de fabrication d’une structure Active FR3094561B1 (fr)

Priority Applications (5)

Application Number Priority Date Filing Date Title
FR1903041A FR3094561B1 (fr) 2019-03-25 2019-03-25 Procédé de fabrication d’une structure
EP20726189.2A EP3915139A1 (fr) 2019-03-25 2020-03-13 Procede de fabrication d'une structure
US17/441,879 US20220189910A1 (en) 2019-03-25 2020-03-13 Method for manufacturing a structure
PCT/FR2020/050531 WO2020193903A1 (fr) 2019-03-25 2020-03-13 Procede de fabrication d'une structure
TW109109812A TWI840537B (zh) 2019-03-25 2020-03-24 封裝介於主動元件與組裝有該元件之支撐件之間的互連件空間之方法

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR1903041A FR3094561B1 (fr) 2019-03-25 2019-03-25 Procédé de fabrication d’une structure
FR1903041 2019-03-25

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FR3094561A1 FR3094561A1 (fr) 2020-10-02
FR3094561B1 true FR3094561B1 (fr) 2022-08-26

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FR1903041A Active FR3094561B1 (fr) 2019-03-25 2019-03-25 Procédé de fabrication d’une structure

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US (1) US20220189910A1 (fr)
EP (1) EP3915139A1 (fr)
FR (1) FR3094561B1 (fr)
WO (1) WO2020193903A1 (fr)

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7952155B2 (en) * 2007-02-20 2011-05-31 Micron Technology, Inc. Reduced edge effect from recesses in imagers
US8163599B2 (en) * 2008-04-18 2012-04-24 Panasonic Corporation Flip-chip mounting method, flip-chip mounting apparatus and tool protection sheet used in flip-chip mounting apparatus
US9064881B2 (en) * 2010-11-11 2015-06-23 Taiwan Semiconductor Manufacturing Company, Ltd. Protecting flip-chip package using pre-applied fillet
US8945983B2 (en) 2012-12-28 2015-02-03 Taiwan Semiconductor Manufacturing Company, Ltd. System and method to improve package and 3DIC yield in underfill process
US10658554B2 (en) * 2014-06-19 2020-05-19 Inkron Oy LED lamp with siloxane particle material
CN106415826A (zh) * 2014-06-26 2017-02-15 索尼公司 半导体器件和制造半导体器件的方法
FR3047604B1 (fr) * 2016-02-04 2018-02-02 Commissariat A L'energie Atomique Et Aux Energies Alternatives Dispositif electronique hybride protege contre l'humidite et procede de protection contre l'humidite d'un dispositif electronique hybride
FR3053530B1 (fr) 2016-06-30 2018-07-27 Aledia Dispositif optoelectronique a pixels a contraste et luminance ameliores

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FR3094561A1 (fr) 2020-10-02
EP3915139A1 (fr) 2021-12-01
TW202040705A (zh) 2020-11-01
US20220189910A1 (en) 2022-06-16
WO2020193903A1 (fr) 2020-10-01

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