FR3088798B1 - Procede et circuit de controle d'une qualite de metallisation d'un circuit imprime a plusieurs couches - Google Patents
Procede et circuit de controle d'une qualite de metallisation d'un circuit imprime a plusieurs couches Download PDFInfo
- Publication number
- FR3088798B1 FR3088798B1 FR1860575A FR1860575A FR3088798B1 FR 3088798 B1 FR3088798 B1 FR 3088798B1 FR 1860575 A FR1860575 A FR 1860575A FR 1860575 A FR1860575 A FR 1860575A FR 3088798 B1 FR3088798 B1 FR 3088798B1
- Authority
- FR
- France
- Prior art keywords
- circuit
- printed circuit
- vias
- threshold value
- controlling
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 238000001465 metallisation Methods 0.000 title 1
- 238000000034 method Methods 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0266—Marks, test patterns or identification means
- H05K1/0268—Marks, test patterns or identification means for electrical inspection or testing
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/07—Electric details
- H05K2201/0776—Resistance and impedance
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/095—Conductive through-holes or vias
- H05K2201/09627—Special connections between adjacent vias, not for grounding vias
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
- H05K2201/09663—Divided layout, i.e. conductors divided in two or more parts
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
- H05K2201/09672—Superposed layout, i.e. in different planes
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/16—Inspection; Monitoring; Aligning
- H05K2203/162—Testing a finished product, e.g. heat cycle testing of solder joints
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
L'invention concerne un circuit imprimé (1) multi-couches comprenant un circuit de contrôle (1a) comportant n vias (3) connectés en série entre une première (4a) et une deuxième borne électrique (4b) de façon qu'un courant électrique appliqué traverse au moins partiellement chacun des n vias (3). Le circuit de contrôle (1a) comprend des portions de piste (20a à 23a ; 20b à 23b) dans chacune des couches (10 à 13), chacun des n vias (3) reliant une portion de piste d'une couche avec une portion de piste d'une autre couche. Le circuit de contrôle (1a) comprend des moyens de mesure (6) d'une différence de potentiel à ses bornes, des moyens de mémorisation d'une valeur seuil et des moyens de comparaison de la différence de potentiel avec la valeur seuil de façon à valider le circuit imprimé (1) lorsque la différence de potentiel est inférieure à la valeur seuil.
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR1860575A FR3088798B1 (fr) | 2018-11-16 | 2018-11-16 | Procede et circuit de controle d'une qualite de metallisation d'un circuit imprime a plusieurs couches |
CN201980075130.2A CN112970335A (zh) | 2018-11-16 | 2019-11-14 | 用于检查多层印刷电路的金属化的质量的方法和电路 |
PCT/EP2019/081363 WO2020099579A1 (fr) | 2018-11-16 | 2019-11-14 | Procédé et circuit de contrôle d'une qualité de métallisation d'un circuit imprimé à plusieurs couches |
US17/286,939 US11678434B2 (en) | 2018-11-16 | 2019-11-14 | Method and circuit for controlling quality of metallization of a multilayer printed circuit board |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR1860575A FR3088798B1 (fr) | 2018-11-16 | 2018-11-16 | Procede et circuit de controle d'une qualite de metallisation d'un circuit imprime a plusieurs couches |
Publications (2)
Publication Number | Publication Date |
---|---|
FR3088798A1 FR3088798A1 (fr) | 2020-05-22 |
FR3088798B1 true FR3088798B1 (fr) | 2020-10-30 |
Family
ID=66166083
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR1860575A Active FR3088798B1 (fr) | 2018-11-16 | 2018-11-16 | Procede et circuit de controle d'une qualite de metallisation d'un circuit imprime a plusieurs couches |
Country Status (4)
Country | Link |
---|---|
US (1) | US11678434B2 (fr) |
CN (1) | CN112970335A (fr) |
FR (1) | FR3088798B1 (fr) |
WO (1) | WO2020099579A1 (fr) |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2773264B1 (fr) * | 1997-12-30 | 2001-06-08 | St Microelectronics Sa | Portion de circuit integre |
DE202005014705U1 (de) * | 2005-09-16 | 2005-11-17 | Fuba Printed Circuits Gmbh | Leiterplattenanordnung |
FR2892595B1 (fr) | 2005-10-21 | 2010-11-05 | Siemens Vdo Automotive | Procede de controle de la qualite de la metallisation d'un circuit imprime et circuit imprime realise |
US8435082B2 (en) * | 2010-08-03 | 2013-05-07 | Tyco Electronics Corporation | Electrical connectors and printed circuits having broadside-coupling regions |
-
2018
- 2018-11-16 FR FR1860575A patent/FR3088798B1/fr active Active
-
2019
- 2019-11-14 WO PCT/EP2019/081363 patent/WO2020099579A1/fr active Application Filing
- 2019-11-14 CN CN201980075130.2A patent/CN112970335A/zh active Pending
- 2019-11-14 US US17/286,939 patent/US11678434B2/en active Active
Also Published As
Publication number | Publication date |
---|---|
US11678434B2 (en) | 2023-06-13 |
CN112970335A (zh) | 2021-06-15 |
WO2020099579A1 (fr) | 2020-05-22 |
US20220240377A1 (en) | 2022-07-28 |
FR3088798A1 (fr) | 2020-05-22 |
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Legal Events
Date | Code | Title | Description |
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PLFP | Fee payment |
Year of fee payment: 2 |
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PLSC | Publication of the preliminary search report |
Effective date: 20200522 |
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PLFP | Fee payment |
Year of fee payment: 3 |
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PLFP | Fee payment |
Year of fee payment: 4 |
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PLFP | Fee payment |
Year of fee payment: 5 |
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PLFP | Fee payment |
Year of fee payment: 6 |