FR3078821B1 - Procede de realisation d'une bille de brasure sur une face d'un substrat - Google Patents
Procede de realisation d'une bille de brasure sur une face d'un substrat Download PDFInfo
- Publication number
- FR3078821B1 FR3078821B1 FR1852069A FR1852069A FR3078821B1 FR 3078821 B1 FR3078821 B1 FR 3078821B1 FR 1852069 A FR1852069 A FR 1852069A FR 1852069 A FR1852069 A FR 1852069A FR 3078821 B1 FR3078821 B1 FR 3078821B1
- Authority
- FR
- France
- Prior art keywords
- film
- face
- producing
- substrate
- front face
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 238000004519 manufacturing process Methods 0.000 title abstract 2
- 239000000758 substrate Substances 0.000 title abstract 2
- 238000005476 soldering Methods 0.000 title 1
- 230000015572 biosynthetic process Effects 0.000 abstract 1
- 238000005219 brazing Methods 0.000 abstract 1
- 239000000463 material Substances 0.000 abstract 1
- 238000000034 method Methods 0.000 abstract 1
- 238000007650 screen-printing Methods 0.000 abstract 1
- 229910000679 solder Inorganic materials 0.000 abstract 1
Classifications
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- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/11—Manufacturing methods
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
- H01L21/0271—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
- H01L21/0272—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers for lift-off processes
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- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/0401—Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
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- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
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- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L24/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
- Wire Bonding (AREA)
Abstract
L'invention concerne un procédé de réalisation par sérigraphie d'une bille de brasure (50) sur une face avant d'un substrat (10), qui comprend les étapes : a) la formation d'un film (30) sur la face avant ; b) la formation d'une ouverture dans le film (30) ; c) le remplissage de l'ouverture par un matériau de brasure ; d) le retrait du film (30) ; le procédé étant caractérisé en que l'étape a) est précédée de la formation d'une couche intermédiaire (20) intercalée entre le film et la face avant, la couche intermédiaire (20) étant adaptée pour présenter une énergie d'adhésion, selon l'une et/ou l'autre des interfaces formées avec la première face avant et le film, inférieure à l'énergie d'adhésion d'une interface susceptible d'être formée entre le film et la première face avant.
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR1852069A FR3078821B1 (fr) | 2018-03-09 | 2018-03-09 | Procede de realisation d'une bille de brasure sur une face d'un substrat |
PCT/FR2019/050468 WO2019170987A1 (fr) | 2018-03-09 | 2019-03-01 | Procede de realisation d'une bille de brasure sur une face d'un substrat |
US16/977,987 US11309269B2 (en) | 2018-03-09 | 2019-03-01 | Method for producing a solder bump on a substrate surface |
EP19717523.5A EP3743940A1 (fr) | 2018-03-09 | 2019-03-01 | Procede de realisation d'une bille de brasure sur une face d'un substrat |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR1852069A FR3078821B1 (fr) | 2018-03-09 | 2018-03-09 | Procede de realisation d'une bille de brasure sur une face d'un substrat |
FR1852069 | 2018-03-09 |
Publications (2)
Publication Number | Publication Date |
---|---|
FR3078821A1 FR3078821A1 (fr) | 2019-09-13 |
FR3078821B1 true FR3078821B1 (fr) | 2020-04-03 |
Family
ID=62455690
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR1852069A Active FR3078821B1 (fr) | 2018-03-09 | 2018-03-09 | Procede de realisation d'une bille de brasure sur une face d'un substrat |
Country Status (4)
Country | Link |
---|---|
US (1) | US11309269B2 (fr) |
EP (1) | EP3743940A1 (fr) |
FR (1) | FR3078821B1 (fr) |
WO (1) | WO2019170987A1 (fr) |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6586322B1 (en) * | 2001-12-21 | 2003-07-01 | Taiwan Semiconductor Manufacturing Co., Ltd. | Method of making a bump on a substrate using multiple photoresist layers |
JP2004140313A (ja) | 2002-08-22 | 2004-05-13 | Jsr Corp | 二層積層膜を用いた電極パッド上へのバンプ形成方法 |
JP3854213B2 (ja) * | 2002-09-20 | 2006-12-06 | 富士通株式会社 | バンプ電極付き電子部品の製造方法 |
US7517788B2 (en) * | 2005-12-29 | 2009-04-14 | Intel Corporation | System, apparatus, and method for advanced solder bumping |
SG11201605469PA (en) | 2014-01-07 | 2016-08-30 | Brewer Science Inc | Cyclic olefin polymer compositions and polysiloxane release layers for use in temporary wafer bonding processes |
EP3175497A4 (fr) | 2014-08-01 | 2018-11-21 | Orthogonal Inc. | Formation de motifs photolithographique de dispositifs |
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2018
- 2018-03-09 FR FR1852069A patent/FR3078821B1/fr active Active
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2019
- 2019-03-01 EP EP19717523.5A patent/EP3743940A1/fr active Pending
- 2019-03-01 WO PCT/FR2019/050468 patent/WO2019170987A1/fr active Search and Examination
- 2019-03-01 US US16/977,987 patent/US11309269B2/en active Active
Also Published As
Publication number | Publication date |
---|---|
US11309269B2 (en) | 2022-04-19 |
WO2019170987A1 (fr) | 2019-09-12 |
EP3743940A1 (fr) | 2020-12-02 |
FR3078821A1 (fr) | 2019-09-13 |
US20210074659A1 (en) | 2021-03-11 |
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