FR3044163B1 - Procede de gravure selective d’un materiau semi-conducteur en solution. - Google Patents
Procede de gravure selective d’un materiau semi-conducteur en solution. Download PDFInfo
- Publication number
- FR3044163B1 FR3044163B1 FR1561385A FR1561385A FR3044163B1 FR 3044163 B1 FR3044163 B1 FR 3044163B1 FR 1561385 A FR1561385 A FR 1561385A FR 1561385 A FR1561385 A FR 1561385A FR 3044163 B1 FR3044163 B1 FR 3044163B1
- Authority
- FR
- France
- Prior art keywords
- semiconductor material
- solution
- protective layer
- layer
- etching
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 239000000463 material Substances 0.000 title abstract 9
- 239000004065 semiconductor Substances 0.000 title abstract 9
- 238000000034 method Methods 0.000 title abstract 2
- 238000005530 etching Methods 0.000 abstract 5
- 239000011241 protective layer Substances 0.000 abstract 5
- 239000010410 layer Substances 0.000 abstract 4
- 230000001590 oxidative effect Effects 0.000 abstract 1
- 239000000758 substrate Substances 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
- H01L21/30604—Chemical etching
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/321—After treatment
- H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
- H01L21/32133—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
- H01L21/32134—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by liquid etching only
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
- H01L21/0223—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate
- H01L21/02233—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer
- H01L21/02236—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer group IV semiconductor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/321—After treatment
- H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
- H01L21/32139—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer using masks
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/04—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
- H01L21/0223—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate
- H01L21/02233—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer
- H01L21/02236—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer group IV semiconductor
- H01L21/02238—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer group IV semiconductor silicon in uncombined form, i.e. pure silicon
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/321—After treatment
- H01L21/32105—Oxidation of silicon-containing layers
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Chemical & Material Sciences (AREA)
- General Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Crystallography & Structural Chemistry (AREA)
- Ceramic Engineering (AREA)
- Weting (AREA)
Abstract
Procédé de gravure sélective d'un matériau semi-conducteur en solution comportant les étapes successives suivantes : a) fournir un substrat comportant une couche en matériau semi-conducteur amorphe (1) à graver et une couche en matériau semi-conducteur cristallin (2), b) oxyder les surfaces des couches en matériau semi-conducteur amorphe (1) et en matériau semi-conducteur cristallin (2), de manière à former une première couche de protection (3) à la surface du matériau semi-conducteur amorphe (1) et une seconde couche de protection (4) à la surface du matériau semi-conducteur cristallin (2), c) graver la première couche de protection (3) et la couche en matériau semi-conducteur (1) avec une solution de gravure alcaline, la vitesse de gravure v1 de la première couche de protection (3) étant supérieure à la vitesse de gravure v2 de la seconde couche de protection (4).
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR1561385A FR3044163B1 (fr) | 2015-11-25 | 2015-11-25 | Procede de gravure selective d’un materiau semi-conducteur en solution. |
US15/361,193 US9831095B2 (en) | 2015-11-25 | 2016-11-25 | Method for performing selective etching of a semiconductor material in solution |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR1561385 | 2015-11-25 | ||
FR1561385A FR3044163B1 (fr) | 2015-11-25 | 2015-11-25 | Procede de gravure selective d’un materiau semi-conducteur en solution. |
Publications (2)
Publication Number | Publication Date |
---|---|
FR3044163A1 FR3044163A1 (fr) | 2017-05-26 |
FR3044163B1 true FR3044163B1 (fr) | 2018-01-05 |
Family
ID=55300572
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR1561385A Active FR3044163B1 (fr) | 2015-11-25 | 2015-11-25 | Procede de gravure selective d’un materiau semi-conducteur en solution. |
Country Status (2)
Country | Link |
---|---|
US (1) | US9831095B2 (fr) |
FR (1) | FR3044163B1 (fr) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20200135898A1 (en) * | 2018-10-30 | 2020-04-30 | International Business Machines Corporation | Hard mask replenishment for etching processes |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7045407B2 (en) * | 2003-12-30 | 2006-05-16 | Intel Corporation | Amorphous etch stop for the anisotropic etching of substrates |
US7563670B2 (en) * | 2006-11-13 | 2009-07-21 | International Business Machines Corporation | Method for etching single-crystal semiconductor selective to amorphous/polycrystalline semiconductor and structure formed by same |
CN103367151B (zh) * | 2012-03-30 | 2015-12-16 | 中国科学院微电子研究所 | 使源/漏区更接近沟道区的mos器件及其制作方法 |
FR2995134B1 (fr) * | 2012-09-05 | 2015-12-18 | Commissariat Energie Atomique | Procede de gravure d'un materiau semiconducteur cristallin par implantation ionique puis gravure chimique a base de chlorure d'hydrogene |
US9875904B2 (en) * | 2013-01-15 | 2018-01-23 | Mitsubishi Gas Chemical Company, Inc. | Silicon etching liquid, silicon etching method, and microelectromechanical element |
-
2015
- 2015-11-25 FR FR1561385A patent/FR3044163B1/fr active Active
-
2016
- 2016-11-25 US US15/361,193 patent/US9831095B2/en active Active
Also Published As
Publication number | Publication date |
---|---|
FR3044163A1 (fr) | 2017-05-26 |
US20170148638A1 (en) | 2017-05-25 |
US9831095B2 (en) | 2017-11-28 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
MY174538A (en) | Wafer processing method | |
MY181950A (en) | Wafer processing method | |
SG195119A1 (en) | Method of transferring thin films | |
TW201614840A (en) | Semiconductor device and method for fabricating the same | |
WO2009108752A3 (fr) | Structuration induite par laser de surfaces de substrat | |
TW201613037A (en) | Substrate for power modules, substrate with heat sink for power modules and power module with heat sink | |
GB201320040D0 (en) | Runtime dynamic performance skew elimination | |
TW201612965A (en) | Wafer dicing using hybrid laser and plasma etch approach with mask application by vacuum lamination | |
CA2863179A1 (fr) | Traitement thermique de surface pour reutilisation de tranches apres decollage epitaxial | |
PH12018500798B1 (en) | First protective film-forming sheet, method for forming first protective film, and method for manufacturing semiconductor chip | |
FR3048244B1 (fr) | Procede de gravure selective d'une couche ou d'un empilement de couches sur substrat verrier | |
GB2541146A (en) | Method of manufacturing a germanium-on-insulator substrate | |
TW201614728A (en) | Substrate processing method | |
MY183477A (en) | Passivation of light-receiving surfaces of solar cells with crystalline silicon | |
WO2018070801A3 (fr) | Film de support multicouche, procédé de transfert d'élément l'utilisant, et procédé de fabrication de produit électronique pour fabriquer un produit électronique au moyen de ce même procédé de transfert d'élément | |
PH12017500688B1 (en) | Mold release film, process for its production, and process for producing semiconductor package | |
MY192661A (en) | Semiconductor processing tape | |
GB2534675A8 (en) | Compound semiconductor device structures comprising polycrystalline CVD diamond | |
FR2986901B1 (fr) | Substrat microelectronique comprenant une couche de materiau organique enterree | |
FR3048245B1 (fr) | Procede de gravure selective d'une couche ou d'un empilement de couches sur substrat verrier | |
SG11201906504SA (en) | Tape for semiconductor processing | |
SG11201807344RA (en) | Method for determining a suitable implanting energy in a donor substrate and process for fabricating a structure of semiconductor–on–insulator type | |
FR3044163B1 (fr) | Procede de gravure selective d’un materiau semi-conducteur en solution. | |
TW201612017A (en) | Method of manufacturing element laminated film, element laminated film and display device | |
JP2013191656A5 (fr) |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PLFP | Fee payment |
Year of fee payment: 2 |
|
PLSC | Publication of the preliminary search report |
Effective date: 20170526 |
|
PLFP | Fee payment |
Year of fee payment: 3 |
|
PLFP | Fee payment |
Year of fee payment: 5 |
|
PLFP | Fee payment |
Year of fee payment: 6 |
|
PLFP | Fee payment |
Year of fee payment: 7 |
|
PLFP | Fee payment |
Year of fee payment: 8 |
|
PLFP | Fee payment |
Year of fee payment: 9 |