FR3026561B1 - Procede de realisation d'une structure microelectronique multi-niveaux - Google Patents

Procede de realisation d'une structure microelectronique multi-niveaux

Info

Publication number
FR3026561B1
FR3026561B1 FR1459059A FR1459059A FR3026561B1 FR 3026561 B1 FR3026561 B1 FR 3026561B1 FR 1459059 A FR1459059 A FR 1459059A FR 1459059 A FR1459059 A FR 1459059A FR 3026561 B1 FR3026561 B1 FR 3026561B1
Authority
FR
France
Prior art keywords
producing
microelectronic structure
level microelectronic
level
microelectronic
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
FR1459059A
Other languages
English (en)
Other versions
FR3026561A1 (fr
Inventor
Philippe Coronel
Claire Fenouillet-Beranger
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Commissariat a lEnergie Atomique et aux Energies Alternatives CEA
Original Assignee
Commissariat a lEnergie Atomique CEA
Commissariat a lEnergie Atomique et aux Energies Alternatives CEA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Commissariat a lEnergie Atomique CEA, Commissariat a lEnergie Atomique et aux Energies Alternatives CEA filed Critical Commissariat a lEnergie Atomique CEA
Priority to FR1459059A priority Critical patent/FR3026561B1/fr
Priority to US14/865,792 priority patent/US9646846B2/en
Publication of FR3026561A1 publication Critical patent/FR3026561A1/fr
Application granted granted Critical
Publication of FR3026561B1 publication Critical patent/FR3026561B1/fr
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105After-treatment
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8221Three dimensional integrated circuits stacked in different levels
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/06Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
    • H01L27/0688Integrated circuits having a three-dimensional layout

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Micromachines (AREA)
FR1459059A 2014-09-25 2014-09-25 Procede de realisation d'une structure microelectronique multi-niveaux Active FR3026561B1 (fr)

Priority Applications (2)

Application Number Priority Date Filing Date Title
FR1459059A FR3026561B1 (fr) 2014-09-25 2014-09-25 Procede de realisation d'une structure microelectronique multi-niveaux
US14/865,792 US9646846B2 (en) 2014-09-25 2015-09-25 Method for producing a multilevel microelectronic structure

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR1459059A FR3026561B1 (fr) 2014-09-25 2014-09-25 Procede de realisation d'une structure microelectronique multi-niveaux

Publications (2)

Publication Number Publication Date
FR3026561A1 FR3026561A1 (fr) 2016-04-01
FR3026561B1 true FR3026561B1 (fr) 2017-12-15

Family

ID=51932478

Family Applications (1)

Application Number Title Priority Date Filing Date
FR1459059A Active FR3026561B1 (fr) 2014-09-25 2014-09-25 Procede de realisation d'une structure microelectronique multi-niveaux

Country Status (2)

Country Link
US (1) US9646846B2 (fr)
FR (1) FR3026561B1 (fr)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2019123152A1 (fr) * 2017-12-20 2019-06-27 King Abdullah University Of Science And Technology Dispositif électronique monolithique et procédé de fabrication

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6856225B1 (en) 2000-05-17 2005-02-15 Xerox Corporation Photolithographically-patterned out-of-plane coil structures and method of making
US20030020090A1 (en) * 2001-07-25 2003-01-30 Motorola, Inc. Structure including both compound semiconductor devices and silicon devices for optimal performance and function and method for fabricating the structure
DE10159415B4 (de) * 2001-12-04 2012-10-04 MAX-PLANCK-Gesellschaft zur Förderung der Wissenschaften e.V. Verfahren zur Herstellung einer Mikrospule und Mikrospule
FR2894069B1 (fr) 2005-11-28 2008-02-22 St Microelectronics Crolles 2 Fabrication de transistors mos
DE102012221932A1 (de) * 2012-11-30 2014-06-05 Leibniz-Institut für Festkörper- und Werkstoffforschung e.V. Aufgerollte, dreidimensionale Feldeffekttransistoren und ihre Verwendung in der Elektronik, Sensorik und Mikrofluidik

Also Published As

Publication number Publication date
FR3026561A1 (fr) 2016-04-01
US9646846B2 (en) 2017-05-09
US20160093504A1 (en) 2016-03-31

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