FR3013503B1 - Procede de gravure selective d’un masque dispose sur un substrat silicie - Google Patents

Procede de gravure selective d’un masque dispose sur un substrat silicie

Info

Publication number
FR3013503B1
FR3013503B1 FR1361394A FR1361394A FR3013503B1 FR 3013503 B1 FR3013503 B1 FR 3013503B1 FR 1361394 A FR1361394 A FR 1361394A FR 1361394 A FR1361394 A FR 1361394A FR 3013503 B1 FR3013503 B1 FR 3013503B1
Authority
FR
France
Prior art keywords
silicy
substrate
mask provided
selectively engraving
engraving
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR1361394A
Other languages
English (en)
Other versions
FR3013503A1 (fr
Inventor
Nicolas Posseme
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Commissariat a lEnergie Atomique et aux Energies Alternatives CEA
Original Assignee
Commissariat a lEnergie Atomique CEA
Commissariat a lEnergie Atomique et aux Energies Alternatives CEA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Commissariat a lEnergie Atomique CEA, Commissariat a lEnergie Atomique et aux Energies Alternatives CEA filed Critical Commissariat a lEnergie Atomique CEA
Priority to FR1361394A priority Critical patent/FR3013503B1/fr
Priority to PCT/FR2014/052965 priority patent/WO2015075380A1/fr
Priority to JP2016531998A priority patent/JP6499654B2/ja
Priority to US15/030,459 priority patent/US9805948B2/en
Priority to EP14814932.1A priority patent/EP3072149B1/fr
Publication of FR3013503A1 publication Critical patent/FR3013503A1/fr
Application granted granted Critical
Publication of FR3013503B1 publication Critical patent/FR3013503B1/fr
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H10P50/73—
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/017—Manufacturing their source or drain regions, e.g. silicided source or drain regions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/0172—Manufacturing their gate conductors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • H10P30/204—
    • H10P30/21—
    • H10P30/22—
    • H10P50/287—
FR1361394A 2013-11-20 2013-11-20 Procede de gravure selective d’un masque dispose sur un substrat silicie Expired - Fee Related FR3013503B1 (fr)

Priority Applications (5)

Application Number Priority Date Filing Date Title
FR1361394A FR3013503B1 (fr) 2013-11-20 2013-11-20 Procede de gravure selective d’un masque dispose sur un substrat silicie
PCT/FR2014/052965 WO2015075380A1 (fr) 2013-11-20 2014-11-19 Procédé de gravure sélective d'un masque disposé sur un substrat silicié
JP2016531998A JP6499654B2 (ja) 2013-11-20 2014-11-19 シリコン基板上に堆積されたマスクの選択的エッチング方法
US15/030,459 US9805948B2 (en) 2013-11-20 2014-11-19 Selective etching process of a mask disposed on a silicon substrate
EP14814932.1A EP3072149B1 (fr) 2013-11-20 2014-11-19 Procédé de gravure sélective d'un masque disposé sur un substrat silicié

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR1361394A FR3013503B1 (fr) 2013-11-20 2013-11-20 Procede de gravure selective d’un masque dispose sur un substrat silicie

Publications (2)

Publication Number Publication Date
FR3013503A1 FR3013503A1 (fr) 2015-05-22
FR3013503B1 true FR3013503B1 (fr) 2015-12-18

Family

ID=49876922

Family Applications (1)

Application Number Title Priority Date Filing Date
FR1361394A Expired - Fee Related FR3013503B1 (fr) 2013-11-20 2013-11-20 Procede de gravure selective d’un masque dispose sur un substrat silicie

Country Status (5)

Country Link
US (1) US9805948B2 (fr)
EP (1) EP3072149B1 (fr)
JP (1) JP6499654B2 (fr)
FR (1) FR3013503B1 (fr)
WO (1) WO2015075380A1 (fr)

Families Citing this family (30)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9132436B2 (en) 2012-09-21 2015-09-15 Applied Materials, Inc. Chemical control features in wafer process equipment
US10256079B2 (en) 2013-02-08 2019-04-09 Applied Materials, Inc. Semiconductor processing systems having multiple plasma configurations
US11637002B2 (en) 2014-11-26 2023-04-25 Applied Materials, Inc. Methods and systems to enhance process uniformity
US20160225652A1 (en) 2015-02-03 2016-08-04 Applied Materials, Inc. Low temperature chuck for plasma processing systems
US9741593B2 (en) 2015-08-06 2017-08-22 Applied Materials, Inc. Thermal management systems and methods for wafer processing systems
US10504700B2 (en) 2015-08-27 2019-12-10 Applied Materials, Inc. Plasma etching systems and methods with secondary plasma injection
US10504754B2 (en) 2016-05-19 2019-12-10 Applied Materials, Inc. Systems and methods for improved semiconductor etching and component protection
US9865484B1 (en) * 2016-06-29 2018-01-09 Applied Materials, Inc. Selective etch using material modification and RF pulsing
US10546729B2 (en) 2016-10-04 2020-01-28 Applied Materials, Inc. Dual-channel showerhead with improved profile
US10431429B2 (en) 2017-02-03 2019-10-01 Applied Materials, Inc. Systems and methods for radial and azimuthal control of plasma uniformity
US10943834B2 (en) 2017-03-13 2021-03-09 Applied Materials, Inc. Replacement contact process
US11276590B2 (en) 2017-05-17 2022-03-15 Applied Materials, Inc. Multi-zone semiconductor substrate supports
US11276559B2 (en) 2017-05-17 2022-03-15 Applied Materials, Inc. Semiconductor processing chamber for multiple precursor flow
JP7176860B6 (ja) 2017-05-17 2022-12-16 アプライド マテリアルズ インコーポレイテッド 前駆体の流れを改善する半導体処理チャンバ
US10297458B2 (en) 2017-08-07 2019-05-21 Applied Materials, Inc. Process window widening using coated parts in plasma etch processes
US10903054B2 (en) 2017-12-19 2021-01-26 Applied Materials, Inc. Multi-zone gas distribution systems and methods
US11328909B2 (en) 2017-12-22 2022-05-10 Applied Materials, Inc. Chamber conditioning and removal processes
US10854426B2 (en) 2018-01-08 2020-12-01 Applied Materials, Inc. Metal recess for semiconductor structures
US10964512B2 (en) 2018-02-15 2021-03-30 Applied Materials, Inc. Semiconductor processing chamber multistage mixing apparatus and methods
US10319600B1 (en) 2018-03-12 2019-06-11 Applied Materials, Inc. Thermal silicon etch
US10886137B2 (en) 2018-04-30 2021-01-05 Applied Materials, Inc. Selective nitride removal
US10892198B2 (en) 2018-09-14 2021-01-12 Applied Materials, Inc. Systems and methods for improved performance in semiconductor processing
US11049755B2 (en) 2018-09-14 2021-06-29 Applied Materials, Inc. Semiconductor substrate supports with embedded RF shield
US11062887B2 (en) 2018-09-17 2021-07-13 Applied Materials, Inc. High temperature RF heater pedestals
US11417534B2 (en) 2018-09-21 2022-08-16 Applied Materials, Inc. Selective material removal
US11682560B2 (en) 2018-10-11 2023-06-20 Applied Materials, Inc. Systems and methods for hafnium-containing film removal
US11121002B2 (en) 2018-10-24 2021-09-14 Applied Materials, Inc. Systems and methods for etching metals and metal derivatives
US11437242B2 (en) 2018-11-27 2022-09-06 Applied Materials, Inc. Selective removal of silicon-containing materials
US11721527B2 (en) 2019-01-07 2023-08-08 Applied Materials, Inc. Processing chamber mixing systems
US10920319B2 (en) 2019-01-11 2021-02-16 Applied Materials, Inc. Ceramic showerheads with conductive electrodes

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05275326A (ja) * 1992-03-30 1993-10-22 Sumitomo Metal Ind Ltd レジストのアッシング方法
JPH11220134A (ja) * 1998-02-03 1999-08-10 Fujitsu Ltd 半導体装置の製造方法
JP5011852B2 (ja) * 2005-07-20 2012-08-29 富士通セミコンダクター株式会社 電子デバイスの製造方法
US20070045230A1 (en) * 2005-08-30 2007-03-01 Micron Technology, Inc. Methods for independently controlling one or more etching parameters in the manufacture of microfeature devices
US7737010B2 (en) * 2006-04-14 2010-06-15 Micron Technology, Inc. Method of photoresist strip for plasma doping process of semiconductor manufacturing
US8980756B2 (en) * 2007-07-30 2015-03-17 Micron Technology, Inc. Methods for device fabrication using pitch reduction
KR101156033B1 (ko) * 2010-12-17 2012-06-18 에스케이하이닉스 주식회사 반도체 장치 제조방법
US8592327B2 (en) * 2012-03-07 2013-11-26 Tokyo Electron Limited Formation of SiOCl-containing layer on exposed low-k surfaces to reduce low-k damage
FR3023971B1 (fr) * 2014-07-18 2016-08-05 Commissariat Energie Atomique Procede de formation des espaceurs d'une grille d'un transistor

Also Published As

Publication number Publication date
EP3072149B1 (fr) 2018-01-10
JP2016537816A (ja) 2016-12-01
FR3013503A1 (fr) 2015-05-22
US20160254165A1 (en) 2016-09-01
US9805948B2 (en) 2017-10-31
EP3072149A1 (fr) 2016-09-28
WO2015075380A1 (fr) 2015-05-28
JP6499654B2 (ja) 2019-04-10

Similar Documents

Publication Publication Date Title
FR3013503B1 (fr) Procede de gravure selective d’un masque dispose sur un substrat silicie
PL3415316T3 (pl) Sposób i urządzenie do wytwarzania strukturyzowanej powierzchni
IL246161B (en) Inspection method, lithographic apparatus, mask and substrate
EP2836056A4 (fr) Procede de fabrication pour un substrat de dissipation thermique
HUE044481T2 (hu) Eljárás kerámia áramkör-lap elõállítására
HUE042248T2 (hu) Eljárás lépésenkénti átmeneti alréteg hozzáférési mintájának jelzésére
FR2985602B1 (fr) Procede de gravure d'un motif complexe
SG11201604779XA (en) Method for producing a block copolymer film on a substrate
FR3002689B1 (fr) Procede de gravure autolimitant a niveaux multiples
EP2705735A4 (fr) Procédé de fabrication de carte de circuit imprimé
TWI562217B (en) Method of forming pattern for integrated circuit and method of patterning substrate
FR3014244B1 (fr) Procede ameliore de realisation d'un substrat semi-conducteur contraint sur isolant
EP2571340A4 (fr) Procédé de fabrication de carte de circuit imprimé
EP2955577A4 (fr) Composé, substance formatrice de sous-couche pour lithographie, sous-couche pour lithographie ainsi que procédé de formation de motif
DK3080797T3 (da) Oplyste mønstre på en overflade
BR112016012624A2 (pt) Método para decorar um item que inclui um revestimento termoestável por flexografia
FR2990384B1 (fr) Procede de texturation sur un substrat de grande surface
IL249047A0 (en) Lithographic apparatus, method of transferring a substrate and device manufacturing method
DK3220421T3 (da) Fremgangsmåde til fremstilling af trykte fotovoltaiske moduler
FR3036513B1 (fr) Procede de communication sur un bus bifilaire
DK2983922T3 (da) Fremgangsmåde til fremstilling af digitalt printede substrater
GB201313054D0 (en) Method of forming a desired pattern on a substrate
DK2988944T3 (da) Fremgangsmåde til fremstilling af en digitalt trykt dekorativ coating på en fast overflade
FR3003998B1 (fr) Procede de fabrication d'un conducteur transparent a motif
EP2542038A4 (fr) Procédé de formation de circuits sur un substrat colaminé flexible

Legal Events

Date Code Title Description
PLFP Fee payment

Year of fee payment: 3

PLFP Fee payment

Year of fee payment: 4

PLFP Fee payment

Year of fee payment: 5

PLFP Fee payment

Year of fee payment: 6

PLFP Fee payment

Year of fee payment: 7

PLFP Fee payment

Year of fee payment: 8

ST Notification of lapse

Effective date: 20220705