FR3001225B1 - Procede de fabrication d’une structure par collage direct - Google Patents

Procede de fabrication d’une structure par collage direct

Info

Publication number
FR3001225B1
FR3001225B1 FR1350568A FR1350568A FR3001225B1 FR 3001225 B1 FR3001225 B1 FR 3001225B1 FR 1350568 A FR1350568 A FR 1350568A FR 1350568 A FR1350568 A FR 1350568A FR 3001225 B1 FR3001225 B1 FR 3001225B1
Authority
FR
France
Prior art keywords
manufacturing direct
direct collage
collage structure
manufacturing
collage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR1350568A
Other languages
English (en)
Other versions
FR3001225A1 (fr
Inventor
Frank Fournel
Cocher Chloe Martin
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Commissariat a lEnergie Atomique et aux Energies Alternatives CEA
Original Assignee
Commissariat a lEnergie Atomique CEA
Commissariat a lEnergie Atomique et aux Energies Alternatives CEA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Commissariat a lEnergie Atomique CEA, Commissariat a lEnergie Atomique et aux Energies Alternatives CEA filed Critical Commissariat a lEnergie Atomique CEA
Priority to FR1350568A priority Critical patent/FR3001225B1/fr
Priority to PCT/FR2014/050116 priority patent/WO2014114876A1/fr
Priority to US14/758,740 priority patent/US10103052B2/en
Priority to EP14704610.6A priority patent/EP2948976A1/fr
Priority to JP2015553150A priority patent/JP2016509372A/ja
Publication of FR3001225A1 publication Critical patent/FR3001225A1/fr
Application granted granted Critical
Publication of FR3001225B1 publication Critical patent/FR3001225B1/fr
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/20—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
    • H01L21/2003—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy characterised by the substrate
    • H01L21/2007—Bonding of semiconductor wafers to insulating substrates or to semiconducting substrates using an intermediate insulating layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
FR1350568A 2013-01-22 2013-01-22 Procede de fabrication d’une structure par collage direct Expired - Fee Related FR3001225B1 (fr)

Priority Applications (5)

Application Number Priority Date Filing Date Title
FR1350568A FR3001225B1 (fr) 2013-01-22 2013-01-22 Procede de fabrication d’une structure par collage direct
PCT/FR2014/050116 WO2014114876A1 (fr) 2013-01-22 2014-01-22 Procédé de fabrication d'une structure par collage direct
US14/758,740 US10103052B2 (en) 2013-01-22 2014-01-22 Method for manufacturing a structure by direct bonding
EP14704610.6A EP2948976A1 (fr) 2013-01-22 2014-01-22 Procédé de fabrication d'une structure par collage direct
JP2015553150A JP2016509372A (ja) 2013-01-22 2014-01-22 直接接合による構造体の製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR1350568A FR3001225B1 (fr) 2013-01-22 2013-01-22 Procede de fabrication d’une structure par collage direct

Publications (2)

Publication Number Publication Date
FR3001225A1 FR3001225A1 (fr) 2014-07-25
FR3001225B1 true FR3001225B1 (fr) 2016-01-22

Family

ID=48140009

Family Applications (1)

Application Number Title Priority Date Filing Date
FR1350568A Expired - Fee Related FR3001225B1 (fr) 2013-01-22 2013-01-22 Procede de fabrication d’une structure par collage direct

Country Status (5)

Country Link
US (1) US10103052B2 (fr)
EP (1) EP2948976A1 (fr)
JP (1) JP2016509372A (fr)
FR (1) FR3001225B1 (fr)
WO (1) WO2014114876A1 (fr)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107742606B (zh) * 2017-10-30 2024-04-02 桂林电子科技大学 一种键合晶圆的结构及其制备方法
US10541214B2 (en) * 2018-04-27 2020-01-21 Juniper Networks, Inc. Enhanced bonding between III-V material and oxide material
JP2020030299A (ja) * 2018-08-22 2020-02-27 日本電気硝子株式会社 光学部品の製造方法
CN111868918B (zh) * 2018-09-03 2022-07-12 浙江三时纪新材科技有限公司 一种半导体封装材料的制备方法以及由此得到的半导体封装材料
WO2020255376A1 (fr) * 2019-06-21 2020-12-24 三菱電機株式会社 Procédé de fabrication d'un substrat composite et substrat composite

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE4115046A1 (de) * 1991-05-08 1992-11-12 Fraunhofer Ges Forschung Direktes substratbonden
US20030037874A1 (en) * 2001-07-26 2003-02-27 Massachusetts Institute Of Technology Semiconductor substrate bonding by mass transport growth fusion
DE102004030612B3 (de) * 2004-06-24 2006-04-20 Siltronic Ag Halbleitersubstrat und Verfahren zu dessen Herstellung
US7261793B2 (en) * 2004-08-13 2007-08-28 Hewlett-Packard Development Company, L.P. System and method for low temperature plasma-enhanced bonding
JP5364368B2 (ja) * 2005-04-21 2013-12-11 エイオーネックス・テクノロジーズ・インコーポレイテッド 基板の製造方法
KR20070071965A (ko) * 2005-12-30 2007-07-04 삼성전자주식회사 실리콘 직접 접합 방법
US8269341B2 (en) * 2008-11-21 2012-09-18 Infineon Technologies Ag Cooling structures and methods
WO2012100786A1 (fr) * 2011-01-25 2012-08-02 Ev Group E. Thallner Gmbh Procédé de collage permanent de tranches

Also Published As

Publication number Publication date
US20150340278A1 (en) 2015-11-26
US10103052B2 (en) 2018-10-16
FR3001225A1 (fr) 2014-07-25
JP2016509372A (ja) 2016-03-24
WO2014114876A1 (fr) 2014-07-31
EP2948976A1 (fr) 2015-12-02

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