FR2986106B1 - Procede de fabrication de substrats semi-conducteur, et substrats semi-conducteur - Google Patents

Procede de fabrication de substrats semi-conducteur, et substrats semi-conducteur

Info

Publication number
FR2986106B1
FR2986106B1 FR1250581A FR1250581A FR2986106B1 FR 2986106 B1 FR2986106 B1 FR 2986106B1 FR 1250581 A FR1250581 A FR 1250581A FR 1250581 A FR1250581 A FR 1250581A FR 2986106 B1 FR2986106 B1 FR 2986106B1
Authority
FR
France
Prior art keywords
semiconductor substrates
manufacturing
manufacturing semiconductor
substrates
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
FR1250581A
Other languages
English (en)
Other versions
FR2986106A1 (fr
Inventor
Francois Boedt
Roland Brun
Olivier Ledoux
Eric Butaud
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Soitec SA
Original Assignee
Soitec SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Soitec SA filed Critical Soitec SA
Priority to FR1250581A priority Critical patent/FR2986106B1/fr
Priority to US14/372,659 priority patent/US9911641B2/en
Priority to PCT/IB2013/000068 priority patent/WO2013108120A1/fr
Priority to DE112013000637.5T priority patent/DE112013000637T5/de
Priority to CN201380006034.5A priority patent/CN104067380B/zh
Publication of FR2986106A1 publication Critical patent/FR2986106A1/fr
Application granted granted Critical
Publication of FR2986106B1 publication Critical patent/FR2986106B1/fr
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • H01L21/76254—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/10—Measuring as part of the manufacturing process
    • H01L22/12—Measuring as part of the manufacturing process for structural parameters, e.g. thickness, line width, refractive index, temperature, warp, bond strength, defects, optical inspection, electrical measurement of structural dimensions, metallurgic measurement of diffusions
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/20—Sequence of activities consisting of a plurality of measurements, corrections, marking or sorting steps
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/36—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the concentration or distribution of impurities in the bulk material

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
FR1250581A 2012-01-20 2012-01-20 Procede de fabrication de substrats semi-conducteur, et substrats semi-conducteur Active FR2986106B1 (fr)

Priority Applications (5)

Application Number Priority Date Filing Date Title
FR1250581A FR2986106B1 (fr) 2012-01-20 2012-01-20 Procede de fabrication de substrats semi-conducteur, et substrats semi-conducteur
US14/372,659 US9911641B2 (en) 2012-01-20 2013-01-14 Process for manufacturing a semiconductor substrate, and semiconductor substrate obtained
PCT/IB2013/000068 WO2013108120A1 (fr) 2012-01-20 2013-01-14 Procédé de fabrication d'un substrat à semi-conducteurs et substrat à semi-conducteurs obtenu
DE112013000637.5T DE112013000637T5 (de) 2012-01-20 2013-01-14 Prozess zum Herstellen eines Halbleitersubstrats und dadurch erhaltenes Halbleitersubstrat
CN201380006034.5A CN104067380B (zh) 2012-01-20 2013-01-14 用于制造半导体衬底的工艺以及所获得的半导体衬底

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR1250581A FR2986106B1 (fr) 2012-01-20 2012-01-20 Procede de fabrication de substrats semi-conducteur, et substrats semi-conducteur

Publications (2)

Publication Number Publication Date
FR2986106A1 FR2986106A1 (fr) 2013-07-26
FR2986106B1 true FR2986106B1 (fr) 2014-08-22

Family

ID=47678938

Family Applications (1)

Application Number Title Priority Date Filing Date
FR1250581A Active FR2986106B1 (fr) 2012-01-20 2012-01-20 Procede de fabrication de substrats semi-conducteur, et substrats semi-conducteur

Country Status (5)

Country Link
US (1) US9911641B2 (fr)
CN (1) CN104067380B (fr)
DE (1) DE112013000637T5 (fr)
FR (1) FR2986106B1 (fr)
WO (1) WO2013108120A1 (fr)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR3076292B1 (fr) * 2017-12-28 2020-01-03 Commissariat A L'energie Atomique Et Aux Energies Alternatives Procede de transfert d'une couche utile sur un substrat support

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4364074A (en) * 1980-06-12 1982-12-14 International Business Machines Corporation V-MOS Device with self-aligned multiple electrodes
US6180497B1 (en) * 1998-07-23 2001-01-30 Canon Kabushiki Kaisha Method for producing semiconductor base members
WO2000013211A2 (fr) * 1998-09-02 2000-03-09 Memc Electronic Materials, Inc. Structure silicium sur isolant obtenue a partir d'un silicium monocristallin a faible taux de defauts
JP2000216208A (ja) 1999-01-20 2000-08-04 Hitachi Ltd 外観検査方法および装置ならびに半導体装置の製造方法
JPWO2004073057A1 (ja) * 2003-02-14 2006-06-01 株式会社Sumco シリコンウェーハの製造方法
DE102004021113B4 (de) * 2004-04-29 2006-04-20 Siltronic Ag SOI-Scheibe und Verfahren zu ihrer Herstellung
US7141179B2 (en) * 2004-08-23 2006-11-28 Macronix International Co., Ltd. Monitoring semiconductor wafer defects below one nanometer
US7352924B2 (en) * 2005-10-11 2008-04-01 Rohm And Haas Electronic Materials Llc Micro-optical device
JP4843399B2 (ja) 2006-07-31 2011-12-21 株式会社日立ハイテクノロジーズ 検査装置及び検査方法
JP2008153411A (ja) 2006-12-18 2008-07-03 Shin Etsu Chem Co Ltd Ｓｏｉ基板の製造方法
DE102008046617B4 (de) * 2008-09-10 2016-02-04 Siltronic Ag Halbleiterscheibe aus einkristallinem Silizium und Verfahren für deren Herstellung
US8148237B2 (en) 2009-08-07 2012-04-03 Varian Semiconductor Equipment Associates, Inc. Pressurized treatment of substrates to enhance cleaving process
US20110242312A1 (en) * 2010-03-30 2011-10-06 Lasertec Corporation Inspection system and inspection method
US9343379B2 (en) * 2011-10-14 2016-05-17 Sunedison Semiconductor Limited Method to delineate crystal related defects

Also Published As

Publication number Publication date
US20140346639A1 (en) 2014-11-27
WO2013108120A1 (fr) 2013-07-25
DE112013000637T5 (de) 2014-10-09
FR2986106A1 (fr) 2013-07-26
US9911641B2 (en) 2018-03-06
CN104067380B (zh) 2017-07-18
CN104067380A (zh) 2014-09-24

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