FR2966285B1 - Procédé de formation de circuits intégrés sur substrat semi conducteur contraint - Google Patents

Procédé de formation de circuits intégrés sur substrat semi conducteur contraint

Info

Publication number
FR2966285B1
FR2966285B1 FR1058377A FR1058377A FR2966285B1 FR 2966285 B1 FR2966285 B1 FR 2966285B1 FR 1058377 A FR1058377 A FR 1058377A FR 1058377 A FR1058377 A FR 1058377A FR 2966285 B1 FR2966285 B1 FR 2966285B1
Authority
FR
France
Prior art keywords
semiconductor substrate
integrated circuits
forming integrated
conducted
conducted semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR1058377A
Other languages
English (en)
Other versions
FR2966285A1 (fr
Inventor
Daniel Bensahel
Aomar Halimaoui
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics Crolles 2 SAS
Original Assignee
STMicroelectronics Crolles 2 SAS
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by STMicroelectronics Crolles 2 SAS filed Critical STMicroelectronics Crolles 2 SAS
Priority to FR1058377A priority Critical patent/FR2966285B1/fr
Priority to US13/240,769 priority patent/US8906776B2/en
Publication of FR2966285A1 publication Critical patent/FR2966285A1/fr
Application granted granted Critical
Publication of FR2966285B1 publication Critical patent/FR2966285B1/fr
Priority to US14/533,770 priority patent/US9525067B2/en
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/7842Field effect transistors with field effect produced by an insulated gate means for exerting mechanical stress on the crystal lattice of the channel region, e.g. using a flexible substrate
    • H01L29/7849Field effect transistors with field effect produced by an insulated gate means for exerting mechanical stress on the crystal lattice of the channel region, e.g. using a flexible substrate the means being provided under the channel
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/30Semiconductor bodies ; Multistep manufacturing processes therefor characterised by physical imperfections; having polished or roughened surface
    • H01L29/32Semiconductor bodies ; Multistep manufacturing processes therefor characterised by physical imperfections; having polished or roughened surface the imperfections being within the semiconductor body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/185Joining of semiconductor bodies for junction formation
    • H01L21/187Joining of semiconductor bodies for junction formation by direct bonding
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/3063Electrolytic etching

Landscapes

  • Microelectronics & Electronic Packaging (AREA)
  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Recrystallisation Techniques (AREA)
  • Element Separation (AREA)
  • Thin Film Transistor (AREA)
FR1058377A 2010-10-14 2010-10-14 Procédé de formation de circuits intégrés sur substrat semi conducteur contraint Expired - Fee Related FR2966285B1 (fr)

Priority Applications (3)

Application Number Priority Date Filing Date Title
FR1058377A FR2966285B1 (fr) 2010-10-14 2010-10-14 Procédé de formation de circuits intégrés sur substrat semi conducteur contraint
US13/240,769 US8906776B2 (en) 2010-10-14 2011-09-22 Method for forming integrated circuits on a strained semiconductor substrate
US14/533,770 US9525067B2 (en) 2010-10-14 2014-11-05 Method for forming integrated circuits on a strained semiconductor substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR1058377A FR2966285B1 (fr) 2010-10-14 2010-10-14 Procédé de formation de circuits intégrés sur substrat semi conducteur contraint

Publications (2)

Publication Number Publication Date
FR2966285A1 FR2966285A1 (fr) 2012-04-20
FR2966285B1 true FR2966285B1 (fr) 2013-09-06

Family

ID=44202201

Family Applications (1)

Application Number Title Priority Date Filing Date
FR1058377A Expired - Fee Related FR2966285B1 (fr) 2010-10-14 2010-10-14 Procédé de formation de circuits intégrés sur substrat semi conducteur contraint

Country Status (2)

Country Link
US (2) US8906776B2 (fr)
FR (1) FR2966285B1 (fr)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013076753A (ja) * 2011-09-29 2013-04-25 Sumitomo Osaka Cement Co Ltd 光導波路素子及びその製造方法
US9224696B2 (en) * 2013-12-03 2015-12-29 United Microelectronics Corporation Integrated semiconductor device and method for fabricating the same
WO2016164765A1 (fr) * 2015-04-08 2016-10-13 University Of Houston System Dispositifs et ensembles photoniques et électroniques à semi-conducteur, conçus sous contrainte externe et leurs procédés de fabrication

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3425167B2 (ja) * 1992-10-27 2003-07-07 シャープ株式会社 薄膜ダイヤモンドの製造方法
US6878611B2 (en) * 2003-01-02 2005-04-12 International Business Machines Corporation Patterned strained silicon for high performance circuits
FR2857502B1 (fr) * 2003-07-10 2006-02-24 Soitec Silicon On Insulator Substrats pour systemes contraints
US7439158B2 (en) * 2003-07-21 2008-10-21 Micron Technology, Inc. Strained semiconductor by full wafer bonding
US7161169B2 (en) * 2004-01-07 2007-01-09 International Business Machines Corporation Enhancement of electron and hole mobilities in <110> Si under biaxial compressive strain
US20070111468A1 (en) * 2005-07-19 2007-05-17 The Regents Of The University Of California Method for fabricating dislocation-free stressed thin films
FR2934416B1 (fr) * 2008-07-24 2011-09-02 Inst Nat Sciences Appliq Substrat semi-conducteur contraint et procede de fabrication associe.
DE102008038342B4 (de) * 2008-08-19 2015-08-06 Infineon Technologies Austria Ag Halbleiterbauelement mit Randbereich, in dem eine Zone aus porösem Material ausgebildet ist und Verfahren zu dessen Herstellung und Halbleiterscheibe

Also Published As

Publication number Publication date
US9525067B2 (en) 2016-12-20
US20120094470A1 (en) 2012-04-19
US20150054141A1 (en) 2015-02-26
US8906776B2 (en) 2014-12-09
FR2966285A1 (fr) 2012-04-20

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Effective date: 20150630