FR2884080B1 - Ensemble de circuits electroniques protege contre des perturbations transitoires - Google Patents

Ensemble de circuits electroniques protege contre des perturbations transitoires

Info

Publication number
FR2884080B1
FR2884080B1 FR0503368A FR0503368A FR2884080B1 FR 2884080 B1 FR2884080 B1 FR 2884080B1 FR 0503368 A FR0503368 A FR 0503368A FR 0503368 A FR0503368 A FR 0503368A FR 2884080 B1 FR2884080 B1 FR 2884080B1
Authority
FR
France
Prior art keywords
electronic circuit
circuit assembly
transient disturbances
assembly protects
protects
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
FR0503368A
Other languages
English (en)
Other versions
FR2884080A1 (fr
Inventor
Michel Nicolaidis
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Iroc Technologies SA
Original Assignee
Iroc Technologies SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Iroc Technologies SA filed Critical Iroc Technologies SA
Priority to FR0503368A priority Critical patent/FR2884080B1/fr
Priority to US11/376,320 priority patent/US7274235B2/en
Publication of FR2884080A1 publication Critical patent/FR2884080A1/fr
Application granted granted Critical
Publication of FR2884080B1 publication Critical patent/FR2884080B1/fr
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/01—Details
    • H03K3/013—Modifications of generator to prevent operation by noise or interference
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/027—Generators characterised by the type of circuit or by the means used for producing pulses by the use of logic circuits, with internal or external positive feedback
    • H03K3/037—Bistable circuits
    • H03K3/0375—Bistable circuits provided with means for increasing reliability; for protection; for ensuring a predetermined initial state when the supply voltage has been applied; for storing the actual state when the supply voltage fails
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/3185—Reconfiguring for testing, e.g. LSSD, partitioning
    • G01R31/318533—Reconfiguring for testing, e.g. LSSD, partitioning using scanning techniques, e.g. LSSD, Boundary Scan, JTAG
    • G01R31/318536—Scan chain arrangements, e.g. connections, test bus, analog signals
FR0503368A 2005-04-05 2005-04-05 Ensemble de circuits electroniques protege contre des perturbations transitoires Active FR2884080B1 (fr)

Priority Applications (2)

Application Number Priority Date Filing Date Title
FR0503368A FR2884080B1 (fr) 2005-04-05 2005-04-05 Ensemble de circuits electroniques protege contre des perturbations transitoires
US11/376,320 US7274235B2 (en) 2005-04-05 2006-03-16 Electronic circuitry protected against transient disturbances and method for simulating disturbances

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR0503368A FR2884080B1 (fr) 2005-04-05 2005-04-05 Ensemble de circuits electroniques protege contre des perturbations transitoires

Publications (2)

Publication Number Publication Date
FR2884080A1 FR2884080A1 (fr) 2006-10-06
FR2884080B1 true FR2884080B1 (fr) 2007-05-25

Family

ID=35385850

Family Applications (1)

Application Number Title Priority Date Filing Date
FR0503368A Active FR2884080B1 (fr) 2005-04-05 2005-04-05 Ensemble de circuits electroniques protege contre des perturbations transitoires

Country Status (2)

Country Link
US (1) US7274235B2 (fr)
FR (1) FR2884080B1 (fr)

Families Citing this family (31)

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US7236009B1 (en) 2004-12-01 2007-06-26 Andre Rohe Operational time extension
US7428721B2 (en) 2004-12-01 2008-09-23 Tabula, Inc. Operational cycle assignment in a configurable IC
US7496879B2 (en) * 2004-12-01 2009-02-24 Tabula, Inc. Concurrent optimization of physical design and operational cycle assignment
US7945829B2 (en) * 2005-01-19 2011-05-17 National University Corporation Chiba University Semiconductor integrated circuit
US7788478B2 (en) 2005-07-15 2010-08-31 Tabula, Inc. Accessing multiple user states concurrently in a configurable IC
US7372297B1 (en) 2005-11-07 2008-05-13 Tabula Inc. Hybrid interconnect/logic circuits enabling efficient replication of a function in several sub-cycles to save logic and routing resources
US7679401B1 (en) 2005-12-01 2010-03-16 Tabula, Inc. User registers implemented with routing circuits in a configurable IC
US7525344B2 (en) 2007-03-20 2009-04-28 Tabula, Inc. Configurable IC having a routing fabric with storage elements
GB2479090B (en) * 2007-04-03 2011-11-16 Advanced Risc Mach Ltd Error recovery following erroneous execution with an instruction processing pipeline
GB2448118B (en) * 2007-04-03 2011-08-24 Advanced Risc Mach Ltd Error recovery following erroneous execution with an instruction processing pipeline
US8069425B2 (en) 2007-06-27 2011-11-29 Tabula, Inc. Translating a user design in a configurable IC for debugging the user design
US7827454B2 (en) * 2007-07-17 2010-11-02 Renesas Electronics Corporation Semiconductor device
WO2009039462A1 (fr) * 2007-09-19 2009-03-26 Tabula, Inc. Procédé et système pour faire état d'une structure de circuit primaire d'un circuit intégré (ic) en utilisant une structure de circuit secondaire de l'ic
JP2009147221A (ja) * 2007-12-17 2009-07-02 Renesas Technology Corp 半導体装置
US8863067B1 (en) 2008-02-06 2014-10-14 Tabula, Inc. Sequential delay analysis by placement engines
US20110191646A1 (en) * 2008-04-04 2011-08-04 Arizona Board of Regents, a body Corporate of the State of Arizona, Acting for and Fault-and Variation-Tolerant Energy - and Area-Efficient Links for Network-on-Chips
US8166435B2 (en) 2008-06-26 2012-04-24 Tabula, Inc. Timing operations in an IC with configurable circuits
US8525548B2 (en) 2008-08-04 2013-09-03 Tabula, Inc. Trigger circuits and event counters for an IC
WO2010033263A1 (fr) 2008-09-17 2010-03-25 Tabula, Inc. Éléments de stockage contrôlables pour un circuit intégré
DE102009029784A1 (de) * 2009-06-18 2010-12-30 Atmel Automotive Gmbh Integrierter Schaltkreis und Standardzelle eines integrierten Schaltkreises
US9378077B2 (en) * 2009-08-07 2016-06-28 Stmicroelectronics S.R.L. System for detecting operating errors in integrated circuits
US8941409B2 (en) 2011-07-01 2015-01-27 Tabula, Inc. Configurable storage elements
US9148151B2 (en) 2011-07-13 2015-09-29 Altera Corporation Configurable storage elements
US8589841B2 (en) * 2012-04-05 2013-11-19 International Business Machines Corporation Automatic parity checking identification
US9436565B2 (en) 2013-07-04 2016-09-06 Altera Corporation Non-intrusive monitoring and control of integrated circuits
US20170184664A1 (en) * 2015-12-28 2017-06-29 Michel Nicolaidis Highly efficient double-sampling architectures
WO2019106225A1 (fr) * 2017-12-01 2019-06-06 Minima Processor Oy Procédé et agencement pour assurer des données valides au niveau d'un second étage d'un circuit de registre numérique
US11022649B2 (en) * 2018-11-30 2021-06-01 Arm Limited Stabilised failure estimate in circuits
WO2020115352A1 (fr) * 2018-12-05 2020-06-11 Minima Processor Oy Circuit de registre avec détection d'événements de données, et procédé de détection d'événements de données dans un circuit de registre
US10890622B2 (en) * 2019-04-29 2021-01-12 International Business Machines Corporation Integrated circuit control latch protection
US11686769B1 (en) * 2022-01-05 2023-06-27 Nxp B.V. Signal toggling detection and correction circuit

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4525635A (en) * 1982-12-15 1985-06-25 Rca Corporation Transient signal suppression circuit
US5525921A (en) * 1994-04-07 1996-06-11 Vlsi Technology, Inc. Logic suppression of input and ground spikes for synchronized inputs
FR2790887B1 (fr) * 1999-03-09 2003-01-03 Univ Joseph Fourier Circuit logique protege contre des perturbations transitoires
US6353341B1 (en) * 1999-11-12 2002-03-05 Xilinx, Inc. Method and apparatus for discriminating against signal interference
US7278080B2 (en) 2003-03-20 2007-10-02 Arm Limited Error detection and recovery within processing stages of an integrated circuit

Also Published As

Publication number Publication date
FR2884080A1 (fr) 2006-10-06
US7274235B2 (en) 2007-09-25
US20060220716A1 (en) 2006-10-05

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