FR2879321B1 - Circuit de pilotage de bus - Google Patents

Circuit de pilotage de bus

Info

Publication number
FR2879321B1
FR2879321B1 FR0413139A FR0413139A FR2879321B1 FR 2879321 B1 FR2879321 B1 FR 2879321B1 FR 0413139 A FR0413139 A FR 0413139A FR 0413139 A FR0413139 A FR 0413139A FR 2879321 B1 FR2879321 B1 FR 2879321B1
Authority
FR
France
Prior art keywords
driving circuit
bus driving
bus
circuit
driving
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR0413139A
Other languages
English (en)
Other versions
FR2879321A1 (fr
Inventor
Kuno Lenz
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics SA
Original Assignee
STMicroelectronics SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by STMicroelectronics SA filed Critical STMicroelectronics SA
Priority to FR0413139A priority Critical patent/FR2879321B1/fr
Priority to US11/296,186 priority patent/US7391239B2/en
Publication of FR2879321A1 publication Critical patent/FR2879321A1/fr
Application granted granted Critical
Publication of FR2879321B1 publication Critical patent/FR2879321B1/fr
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4063—Device-to-bus coupling
    • G06F13/4068—Electrical coupling
    • G06F13/4072—Drivers or receivers
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0008—Arrangements for reducing power consumption
    • H03K19/0013—Arrangements for reducing power consumption in field effect transistor circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/01—Modifications for accelerating switching
    • H03K19/017—Modifications for accelerating switching in field-effect transistor circuits
    • H03K19/01707—Modifications for accelerating switching in field-effect transistor circuits in asynchronous circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/01—Modifications for accelerating switching
    • H03K19/017—Modifications for accelerating switching in field-effect transistor circuits
    • H03K19/01707—Modifications for accelerating switching in field-effect transistor circuits in asynchronous circuits
    • H03K19/01721—Modifications for accelerating switching in field-effect transistor circuits in asynchronous circuits by means of a pull-up or down element

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • Mathematical Physics (AREA)
  • Theoretical Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Logic Circuits (AREA)
  • Electronic Switches (AREA)
FR0413139A 2004-12-09 2004-12-09 Circuit de pilotage de bus Expired - Fee Related FR2879321B1 (fr)

Priority Applications (2)

Application Number Priority Date Filing Date Title
FR0413139A FR2879321B1 (fr) 2004-12-09 2004-12-09 Circuit de pilotage de bus
US11/296,186 US7391239B2 (en) 2004-12-09 2005-12-07 Bus driver circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR0413139A FR2879321B1 (fr) 2004-12-09 2004-12-09 Circuit de pilotage de bus

Publications (2)

Publication Number Publication Date
FR2879321A1 FR2879321A1 (fr) 2006-06-16
FR2879321B1 true FR2879321B1 (fr) 2007-03-02

Family

ID=34952885

Family Applications (1)

Application Number Title Priority Date Filing Date
FR0413139A Expired - Fee Related FR2879321B1 (fr) 2004-12-09 2004-12-09 Circuit de pilotage de bus

Country Status (2)

Country Link
US (1) US7391239B2 (fr)
FR (1) FR2879321B1 (fr)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4744999B2 (ja) * 2005-09-15 2011-08-10 ルネサスエレクトロニクス株式会社 出力バッファ回路
US7876133B1 (en) * 2006-09-27 2011-01-25 Cypress Semiconductor Corporation Output buffer circuit
DE102007053874B3 (de) * 2007-11-09 2009-04-09 Atmel Germany Gmbh Monolithisch integrierter Schaltkreis und Verwendung eines Halbleiterschalters
WO2010001200A1 (fr) * 2008-06-30 2010-01-07 Freescale Semiconductor, Inc. Gestion des anomalies pour bus de communication
US20110022783A1 (en) * 2009-07-24 2011-01-27 Stec, Inc. Flash storage with increased throughput
US20110022782A1 (en) * 2009-07-24 2011-01-27 Stec, Inc. Flash storage with array of attached devices
US8138806B2 (en) * 2010-01-20 2012-03-20 Texas Instruments Incorporated Driver circuit for high voltage differential signaling
TWI543503B (zh) * 2015-02-03 2016-07-21 天鈺科技股份有限公司 開關電路
US11165417B2 (en) * 2019-09-19 2021-11-02 Infineon Technologies Ag Efficient high-voltage digital I/O protection

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3601624A (en) * 1969-12-22 1971-08-24 North American Rockwell Large scale array driver for bipolar devices
US5218239A (en) * 1991-10-03 1993-06-08 National Semiconductor Corporation Selectable edge rate cmos output buffer circuit
EP0678983B1 (fr) * 1994-04-22 1998-08-26 STMicroelectronics S.r.l. Circuit intégré pour commander la vitesse de montée de courant d'un tampon de sortie
US5808481A (en) * 1996-06-28 1998-09-15 Intel Corporation Output swing clamp for USB differential buffer
US5877635A (en) * 1997-03-07 1999-03-02 Taiwan Semiconductor Manufacturing Co., Ltd. Full-swing buffer circuit with charge pump
US5883531A (en) * 1997-08-18 1999-03-16 National Semiconductor Corporation Universal serial bus driver having MOS transistor gate capacitor
US6130563A (en) * 1997-09-10 2000-10-10 Integrated Device Technology, Inc. Output driver circuit for high speed digital signal transmission
US5973512A (en) * 1997-12-02 1999-10-26 National Semiconductor Corporation CMOS output buffer having load independent slewing
US6370371B1 (en) * 1998-10-21 2002-04-09 Parkervision, Inc. Applications of universal frequency translation
US6313672B1 (en) * 1999-12-15 2001-11-06 Exar Corporation Over-voltage tolerant integrated circuit I/O buffer
US6429686B1 (en) * 2000-06-16 2002-08-06 Xilinx, Inc. Output driver circuit using thin and thick gate oxides
KR100423898B1 (ko) * 2001-06-16 2004-03-22 삼성전자주식회사 크로스오버 성능이 개선된 유니버셜 시리얼 버스 저속트랜시버
US7543100B2 (en) 2001-06-18 2009-06-02 3Par, Inc. Node controller for a data storage system
JP3464471B2 (ja) * 2002-01-17 2003-11-10 沖電気工業株式会社 出力バッファ回路
TW548895B (en) * 2002-02-22 2003-08-21 Winbond Electronics Corp Differential output driving apparatus

Also Published As

Publication number Publication date
US20060158232A1 (en) 2006-07-20
US7391239B2 (en) 2008-06-24
FR2879321A1 (fr) 2006-06-16

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Legal Events

Date Code Title Description
ST Notification of lapse

Effective date: 20090831