FR2872629B1 - Circuit integre ayant une borne d'entree/sortie configurable dans une gamme de tension determinee - Google Patents

Circuit integre ayant une borne d'entree/sortie configurable dans une gamme de tension determinee

Info

Publication number
FR2872629B1
FR2872629B1 FR0407245A FR0407245A FR2872629B1 FR 2872629 B1 FR2872629 B1 FR 2872629B1 FR 0407245 A FR0407245 A FR 0407245A FR 0407245 A FR0407245 A FR 0407245A FR 2872629 B1 FR2872629 B1 FR 2872629B1
Authority
FR
France
Prior art keywords
voltage
integrated circuit
output terminal
determined range
configurable input
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR0407245A
Other languages
English (en)
Other versions
FR2872629A1 (fr
Inventor
Herve Chalopin
Laurent Tabaries
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics SA
Original Assignee
STMicroelectronics SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by STMicroelectronics SA filed Critical STMicroelectronics SA
Priority to FR0407245A priority Critical patent/FR2872629B1/fr
Priority to US11/170,760 priority patent/US20060022710A1/en
Publication of FR2872629A1 publication Critical patent/FR2872629A1/fr
Application granted granted Critical
Publication of FR2872629B1 publication Critical patent/FR2872629B1/fr
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175—Coupling arrangements; Interface arrangements
    • H03K19/0185—Coupling arrangements; Interface arrangements using field effect transistors only
    • H03K19/018585—Coupling arrangements; Interface arrangements using field effect transistors only programmable
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/0555—Shape
    • H01L2224/05552—Shape in top view
    • H01L2224/05553—Shape in top view being rectangular
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/528—Geometry or layout of the interconnection structure
    • H01L23/5286—Arrangements of power or ground buses
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Logic Circuits (AREA)
FR0407245A 2004-06-30 2004-06-30 Circuit integre ayant une borne d'entree/sortie configurable dans une gamme de tension determinee Expired - Fee Related FR2872629B1 (fr)

Priority Applications (2)

Application Number Priority Date Filing Date Title
FR0407245A FR2872629B1 (fr) 2004-06-30 2004-06-30 Circuit integre ayant une borne d'entree/sortie configurable dans une gamme de tension determinee
US11/170,760 US20060022710A1 (en) 2004-06-30 2005-06-28 Integrated circuit having an input/output terminal configurable within a given voltage range

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR0407245A FR2872629B1 (fr) 2004-06-30 2004-06-30 Circuit integre ayant une borne d'entree/sortie configurable dans une gamme de tension determinee

Publications (2)

Publication Number Publication Date
FR2872629A1 FR2872629A1 (fr) 2006-01-06
FR2872629B1 true FR2872629B1 (fr) 2007-07-13

Family

ID=34947669

Family Applications (1)

Application Number Title Priority Date Filing Date
FR0407245A Expired - Fee Related FR2872629B1 (fr) 2004-06-30 2004-06-30 Circuit integre ayant une borne d'entree/sortie configurable dans une gamme de tension determinee

Country Status (2)

Country Link
US (1) US20060022710A1 (fr)
FR (1) FR2872629B1 (fr)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8064197B2 (en) 2009-05-22 2011-11-22 Advanced Micro Devices, Inc. Heat management using power management information
US9848515B1 (en) 2016-05-27 2017-12-19 Advanced Micro Devices, Inc. Multi-compartment computing device with shared cooling device

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5140196A (en) * 1991-04-15 1992-08-18 Motorola, Inc. Variable level translator
JP2910474B2 (ja) * 1992-02-21 1999-06-23 日本電気株式会社 半導体集積回路装置
FR2760914B1 (fr) * 1997-03-14 1999-05-14 Matra Mhs Circuit convertisseur de niveaux analogiques
US6111450A (en) * 1998-07-15 2000-08-29 Lucent Technologies, Inc. Operating voltage adapting buffer
US6271679B1 (en) * 1999-03-24 2001-08-07 Altera Corporation I/O cell configuration for multiple I/O standards
JP4963144B2 (ja) * 2000-06-22 2012-06-27 ルネサスエレクトロニクス株式会社 半導体集積回路
JP3786608B2 (ja) * 2002-01-28 2006-06-14 株式会社ルネサステクノロジ 半導体集積回路装置
US6856173B1 (en) * 2003-09-05 2005-02-15 Freescale Semiconductor, Inc. Multiplexing of digital signals at multiple supply voltages in an integrated circuit
JP4367700B2 (ja) * 2004-03-30 2009-11-18 株式会社ルネサステクノロジ 半導体集積回路装置
US7750500B2 (en) * 2004-06-28 2010-07-06 Broadcom Corporation Integrated circuit with multiple independent power supply zones

Also Published As

Publication number Publication date
FR2872629A1 (fr) 2006-01-06
US20060022710A1 (en) 2006-02-02

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Legal Events

Date Code Title Description
ST Notification of lapse

Effective date: 20100226