FR2867579B1 - Multiplieur modulaire de montgomery - Google Patents
Multiplieur modulaire de montgomeryInfo
- Publication number
- FR2867579B1 FR2867579B1 FR0502052A FR0502052A FR2867579B1 FR 2867579 B1 FR2867579 B1 FR 2867579B1 FR 0502052 A FR0502052 A FR 0502052A FR 0502052 A FR0502052 A FR 0502052A FR 2867579 B1 FR2867579 B1 FR 2867579B1
- Authority
- FR
- France
- Prior art keywords
- montgomery
- modular multiplier
- multiplier
- modular
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/52—Multiplying; Dividing
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/60—Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers
- G06F7/72—Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers using residue arithmetic
- G06F7/728—Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers using residue arithmetic using Montgomery reduction
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/52—Multiplying; Dividing
- G06F7/523—Multiplying only
- G06F7/533—Reduction of the number of iteration steps or stages, e.g. using the Booth algorithm, log-sum, odd-even
- G06F7/5334—Reduction of the number of iteration steps or stages, e.g. using the Booth algorithm, log-sum, odd-even by using multiple bit scanning, i.e. by decoding groups of successive multiplier bits in order to select an appropriate precalculated multiple of the multiplicand as a partial product
- G06F7/5336—Reduction of the number of iteration steps or stages, e.g. using the Booth algorithm, log-sum, odd-even by using multiple bit scanning, i.e. by decoding groups of successive multiplier bits in order to select an appropriate precalculated multiple of the multiplicand as a partial product overlapped, i.e. with successive bitgroups sharing one or more bits being recoded into signed digit representation, e.g. using the Modified Booth Algorithm
Landscapes
- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Mathematical Analysis (AREA)
- Mathematical Optimization (AREA)
- Pure & Applied Mathematics (AREA)
- Computational Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Complex Calculations (AREA)
- Executing Machine-Instructions (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020040013855A KR20050088506A (ko) | 2004-03-02 | 2004-03-02 | 다중 세정도를 지원하는 확장형 몽고메리 모듈러 곱셈기 |
Publications (2)
Publication Number | Publication Date |
---|---|
FR2867579A1 FR2867579A1 (fr) | 2005-09-16 |
FR2867579B1 true FR2867579B1 (fr) | 2008-04-18 |
Family
ID=34909984
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR0502052A Active FR2867579B1 (fr) | 2004-03-02 | 2005-03-01 | Multiplieur modulaire de montgomery |
Country Status (6)
Country | Link |
---|---|
US (1) | US7805478B2 (fr) |
JP (1) | JP4870932B2 (fr) |
KR (1) | KR20050088506A (fr) |
CN (1) | CN1702613A (fr) |
DE (1) | DE102005010764A1 (fr) |
FR (1) | FR2867579B1 (fr) |
Families Citing this family (34)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100458031B1 (ko) * | 2003-03-14 | 2004-11-26 | 삼성전자주식회사 | 몽고메리 유형의 모듈라 곱셈 장치 및 방법 |
US8073892B2 (en) * | 2005-12-30 | 2011-12-06 | Intel Corporation | Cryptographic system, method and multiplier |
DE102007014808A1 (de) * | 2007-03-28 | 2008-10-02 | Texas Instruments Deutschland Gmbh | Multiplizier- und Multiplizier- und Addiereinheit |
CA2701855C (fr) * | 2007-11-02 | 2016-10-11 | Certicom Corp. | Arithmetique de montgomery signee |
KR100946256B1 (ko) * | 2007-12-26 | 2010-03-08 | 대구대학교 산학협력단 | 다정도 캐리 세이브 가산기를 이용한 듀얼필드상의확장성있는 몽고매리 곱셈기 |
KR101590322B1 (ko) * | 2009-05-15 | 2016-02-19 | 삼성전자주식회사 | 연산임계경로가 감소된 모듈러 곱셈기 및 연산임계경로 감소방법 |
KR101248912B1 (ko) * | 2009-12-31 | 2013-03-29 | 한양대학교 산학협력단 | 항혈관신생 활성을 가지는 재조합 아데노바이러스 |
KR20110105555A (ko) * | 2010-03-19 | 2011-09-27 | 삼성전자주식회사 | 효율적인 하드웨어 구성을 갖는 몽고메리 승산기 |
KR101925868B1 (ko) | 2012-05-17 | 2018-12-06 | 삼성전자주식회사 | 모듈러 계산 유닛 및 그것을 포함하는 보안 시스템 |
KR101929984B1 (ko) * | 2012-05-17 | 2018-12-18 | 삼성전자주식회사 | 모듈러 곱셈기 및 그것의 모듈러 곱셈 방법 |
CN103645883A (zh) * | 2013-12-18 | 2014-03-19 | 四川卫士通信息安全平台技术有限公司 | 基于fpga的高基模乘器 |
US9535656B2 (en) * | 2014-03-14 | 2017-01-03 | International Business Machines Corporation | Pipelined modular reduction and division |
KR102132261B1 (ko) * | 2014-03-31 | 2020-08-06 | 삼성전자주식회사 | 비교 연산이 필요없이 최종 모듈러 감소를 하는 몽고메리 곱셈 방법 및 곱셈기 |
CN103970504B (zh) * | 2014-05-07 | 2017-03-29 | 广东顺德中山大学卡内基梅隆大学国际联合研究院 | 在ecc中实现位数自适应模乘运算的方法及模乘运算器 |
CN104090737B (zh) * | 2014-07-04 | 2017-04-05 | 东南大学 | 一种改进型部分并行架构乘法器及其处理方法 |
KR102338863B1 (ko) | 2015-09-09 | 2021-12-13 | 삼성전자주식회사 | 연산을 제어하기 위한 장치 및 방법 |
IL244842A0 (en) * | 2016-03-30 | 2016-07-31 | Winbond Electronics Corp | Efficient non-modular multiplexing is protected against side-channel attacks |
CN106528046B (zh) * | 2016-11-02 | 2019-06-07 | 上海集成电路研发中心有限公司 | 长位宽时序累加乘法器 |
KR102594656B1 (ko) * | 2016-11-25 | 2023-10-26 | 삼성전자주식회사 | 보안 프로세서, 이를 포함하는 어플리케이션 프로세서 및 보안 프로세서의 동작 방법 |
CN108241481B (zh) * | 2016-12-26 | 2022-08-23 | 航天信息股份有限公司 | 一种适用于rsa算法的部分求余乘法器设备 |
CN108242994B (zh) * | 2016-12-26 | 2021-08-13 | 阿里巴巴集团控股有限公司 | 密钥的处理方法和装置 |
CN108564169B (zh) * | 2017-04-11 | 2020-07-14 | 上海兆芯集成电路有限公司 | 硬件处理单元、神经网络单元和计算机可用介质 |
RU2653263C1 (ru) * | 2017-07-24 | 2018-05-07 | федеральное государственное автономное образовательное учреждение высшего образования "Северо-Кавказский федеральный университет" | Арифметико-логическое устройство для умножения чисел по модулю |
JP7129857B2 (ja) * | 2018-09-07 | 2022-09-02 | ルネサスエレクトロニクス株式会社 | 積和演算装置、積和演算方法、及びシステム |
CN109857368B (zh) * | 2018-12-20 | 2022-07-26 | 上海大学 | 一种位数众多、可分组、可重构的多值电子运算器及方法 |
CN109669670B (zh) * | 2018-12-26 | 2020-09-22 | 贵州华芯通半导体技术有限公司 | 用于蒙哥马利模乘中的不均等分块的数据处理方法及装置 |
EP4095829A4 (fr) * | 2020-01-20 | 2023-10-18 | Nippon Telegraph And Telephone Corporation | Dispositif de calcul sécurisé, procédé de calcul sécurisé et programme |
WO2021149106A1 (fr) * | 2020-01-20 | 2021-07-29 | 日本電信電話株式会社 | Dispositif et procédé de calcul de sécurité, et programme |
EP4080350A4 (fr) * | 2020-04-01 | 2022-12-28 | Huawei Technologies Co., Ltd. | Multiplicateur de fusion multimode |
CN112328962B (zh) * | 2020-11-27 | 2021-12-31 | 深圳致星科技有限公司 | 矩阵运算优化方法、装置、设备和可读存储介质 |
CN112506468B (zh) * | 2020-12-09 | 2023-04-28 | 上海交通大学 | 支持高吞吐多精度乘法运算的risc-v通用处理器 |
CN113032845B (zh) * | 2021-03-31 | 2022-02-11 | 郑州信大捷安信息技术股份有限公司 | 一种用于资源受限芯片的EdDSA签名实现方法和装置 |
CN113296733B (zh) * | 2021-04-25 | 2024-09-03 | 阿里巴巴创新公司 | 数据处理方法以及装置 |
TWI802095B (zh) | 2021-11-22 | 2023-05-11 | 財團法人工業技術研究院 | 模數乘法電路與對應之計算模數乘法之方法 |
Family Cites Families (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2726667B1 (fr) * | 1994-11-08 | 1997-01-17 | Sgs Thomson Microelectronics | Procede de mise en oeuvre de multiplication modulaire selon la methode montgomery |
KR100257124B1 (ko) | 1997-05-16 | 2000-05-15 | 문상재 | 공통 피승수 모듈라 곱셈을 이용한 고속 멱승 방법 |
US6356636B1 (en) | 1998-07-22 | 2002-03-12 | Motorola, Inc. | Circuit and method for fast modular multiplication |
GB2352309B (en) * | 1999-07-21 | 2004-02-11 | Advanced Risc Mach Ltd | A system and method for performing modular multiplication |
JP2002236581A (ja) * | 2001-02-08 | 2002-08-23 | Matsushita Electric Ind Co Ltd | 演算回路、演算方法、及びプログラム記録媒体 |
FR2822260A1 (fr) | 2001-03-14 | 2002-09-20 | Bull Sa | Procedes et dispositifs pour accelerer le temps de calcul d'un produit de montgomery d'un multiplication et d'une exponentiation modulaire |
US20020172355A1 (en) | 2001-04-04 | 2002-11-21 | Chih-Chung Lu | High-performance booth-encoded montgomery module |
JP2003216411A (ja) * | 2002-01-23 | 2003-07-31 | Sony Corp | 多倍長演算処理装置およびicデバイス |
JP2003216034A (ja) * | 2002-01-23 | 2003-07-30 | Ail Kk | べき乗剰余演算器 |
JP2004258141A (ja) * | 2003-02-24 | 2004-09-16 | Fujitsu Ltd | モンゴメリ乗算剰余の多倍長演算のための演算装置 |
-
2004
- 2004-03-02 KR KR1020040013855A patent/KR20050088506A/ko not_active Application Discontinuation
-
2005
- 2005-03-01 JP JP2005056659A patent/JP4870932B2/ja active Active
- 2005-03-01 FR FR0502052A patent/FR2867579B1/fr active Active
- 2005-03-01 US US11/068,371 patent/US7805478B2/en active Active
- 2005-03-02 DE DE200510010764 patent/DE102005010764A1/de not_active Withdrawn
- 2005-03-02 CN CNA2005100788260A patent/CN1702613A/zh active Pending
Also Published As
Publication number | Publication date |
---|---|
FR2867579A1 (fr) | 2005-09-16 |
CN1702613A (zh) | 2005-11-30 |
JP2005250481A (ja) | 2005-09-15 |
DE102005010764A1 (de) | 2005-09-29 |
US20050198093A1 (en) | 2005-09-08 |
KR20050088506A (ko) | 2005-09-07 |
JP4870932B2 (ja) | 2012-02-08 |
US7805478B2 (en) | 2010-09-28 |
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