FR2847093A1 - Procede et appareil de chiffrement avec une structure (des) parallele - Google Patents

Procede et appareil de chiffrement avec une structure (des) parallele

Info

Publication number
FR2847093A1
FR2847093A1 FR0313192A FR0313192A FR2847093A1 FR 2847093 A1 FR2847093 A1 FR 2847093A1 FR 0313192 A FR0313192 A FR 0313192A FR 0313192 A FR0313192 A FR 0313192A FR 2847093 A1 FR2847093 A1 FR 2847093A1
Authority
FR
France
Prior art keywords
block
encryption
des
stage
reverse
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
FR0313192A
Other languages
English (en)
Other versions
FR2847093B1 (fr
Inventor
Duck Seo Kyung
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Samsung Electronics Co Ltd
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Publication of FR2847093A1 publication Critical patent/FR2847093A1/fr
Application granted granted Critical
Publication of FR2847093B1 publication Critical patent/FR2847093B1/fr
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
    • H04L9/06Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols the encryption apparatus using shift registers or memories for block-wise or stream coding, e.g. DES systems or RC4; Hash functions; Pseudorandom sequence generators
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
    • H04L9/06Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols the encryption apparatus using shift registers or memories for block-wise or stream coding, e.g. DES systems or RC4; Hash functions; Pseudorandom sequence generators
    • H04L9/0618Block ciphers, i.e. encrypting groups of characters of a plain text message using fixed encryption transformation
    • H04L9/0625Block ciphers, i.e. encrypting groups of characters of a plain text message using fixed encryption transformation with splitting of the data block into left and right halves, e.g. Feistel based algorithms, DES, FEAL, IDEA or KASUMI
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
    • H04L9/002Countermeasures against attacks on cryptographic mechanisms
    • H04L9/003Countermeasures against attacks on cryptographic mechanisms for power analysis, e.g. differential power analysis [DPA] or simple power analysis [SPA]

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Security & Cryptography (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Storage Device Security (AREA)

Abstract

Un appareil de chiffrement comprend des premier et second dispositifs DES à N étages (140, 160) et des premier et second circuits d'entrée inverseurs (INV2, INV1). Le premier dispositif DES à N étages (140) effectue une conversion cryptographique d'un bloc de données d'entrée numérique (D) en un premier bloc de données de sortie numérique (C), sur la base d'un jeu de clés de chiffrement (K1-K16). Le second dispositif DES à N étages (160) effectue une conversion cryptographique du bloc de données d'entrée numérique inversé (D') en un second bloc de données de sortie numérique (C'), sur la base des clés de chiffrement inversées (K1'-K16'). Les deux dispositifs DES effectuent leurs processus de conversion en même temps, pour éviter que la configuration de consommation de courant ne révèle les clés de chiffrement utilisées.
FR0313192A 2002-11-12 2003-11-10 Procede et appareil de chiffrement avec une structure (des) parallele Expired - Fee Related FR2847093B1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR10-2002-0069946A KR100456599B1 (ko) 2002-11-12 2002-11-12 병렬 디이에스 구조를 갖는 암호 장치

Publications (2)

Publication Number Publication Date
FR2847093A1 true FR2847093A1 (fr) 2004-05-14
FR2847093B1 FR2847093B1 (fr) 2005-02-18

Family

ID=32171624

Family Applications (1)

Application Number Title Priority Date Filing Date
FR0313192A Expired - Fee Related FR2847093B1 (fr) 2002-11-12 2003-11-10 Procede et appareil de chiffrement avec une structure (des) parallele

Country Status (4)

Country Link
US (1) US20040096059A1 (fr)
KR (1) KR100456599B1 (fr)
DE (1) DE10352680A1 (fr)
FR (1) FR2847093B1 (fr)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2320595A1 (fr) * 2009-11-04 2011-05-11 STMicroelectronics (Rousset) SAS Protection d'une clé de chiffrement

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
ITMI20011938A1 (it) * 2001-09-17 2003-03-17 Cit Alcatel Metodo per criptare un flusso di dati
KR20080072345A (ko) * 2007-02-02 2008-08-06 삼성전자주식회사 암호화 장치 및 그 방법
JP4687775B2 (ja) * 2008-11-20 2011-05-25 ソニー株式会社 暗号処理装置
FR2952256B1 (fr) * 2009-11-04 2011-12-16 St Microelectronics Rousset Protection d'une cle de chiffrement contre des attaques unidirectionnelles
TWI521935B (zh) * 2013-08-08 2016-02-11 新唐科技股份有限公司 加解密裝置及其加解密方法
US20150222421A1 (en) * 2014-02-03 2015-08-06 Qualcomm Incorporated Countermeasures against side-channel attacks on cryptographic algorithms
CN105337732B (zh) * 2015-10-29 2019-10-15 全球能源互联网研究院 一种可处理大分组数据的加密方法
US10650621B1 (en) 2016-09-13 2020-05-12 Iocurrents, Inc. Interfacing with a vehicular controller area network

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DE19936918A1 (de) * 1998-09-30 2000-04-06 Philips Corp Intellectual Pty Verschlüsselungsverfahren zum Ausführen von kryptographischen Operationen
EP1006492A1 (fr) * 1998-11-30 2000-06-07 Hitachi, Ltd. Dispositif et carte à puce pour le traitement de données
WO2000039660A1 (fr) * 1998-12-28 2000-07-06 Bull Cp8 Circuit integre intelligent
EP1115094A2 (fr) * 2000-01-08 2001-07-11 Philips Corporate Intellectual Property GmbH Dispositif de traitement de données et sa méthode de mise en oeuvre
US20010012360A1 (en) * 2000-01-31 2001-08-09 Mehdi-Laurent Akkar Method of executing a cryptographic protocol between two electronic entities
DE10136335A1 (de) * 2001-07-26 2003-02-13 Infineon Technologies Ag Prozessor mit mehreren Rechenwerken

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US3798359A (en) * 1971-06-30 1974-03-19 Ibm Block cipher cryptographic system
US4613901A (en) * 1983-05-27 1986-09-23 M/A-Com Linkabit, Inc. Signal encryption and distribution system for controlling scrambling and selective remote descrambling of television signals
US4712238A (en) * 1984-06-08 1987-12-08 M/A-Com Government Systems, Inc. Selective-subscription descrambling
US4803725A (en) * 1985-03-11 1989-02-07 General Instrument Corp. Cryptographic system using interchangeable key blocks and selectable key fragments
US5317638A (en) * 1992-07-17 1994-05-31 International Business Machines Corporation Performance enhancement for ANSI X3.92 data encryption algorithm standard
US5473693A (en) * 1993-12-21 1995-12-05 Gi Corporation Apparatus for avoiding complementarity in an encryption algorithm
US5594797A (en) * 1995-02-22 1997-01-14 Nokia Mobile Phones Variable security level encryption
AU693719B2 (en) * 1995-09-05 1998-07-02 Mitsubishi Denki Kabushiki Kaisha Data transformation apparatus and data transformation method
US5870468A (en) * 1996-03-01 1999-02-09 International Business Machines Corporation Enhanced data privacy for portable computers
US5796830A (en) * 1996-07-29 1998-08-18 International Business Machines Corporation Interoperable cryptographic key recovery system
JPH10301490A (ja) * 1997-04-24 1998-11-13 Fuji Xerox Co Ltd 暗号化方法
JPH10303883A (ja) * 1997-04-24 1998-11-13 Fuji Xerox Co Ltd 暗号化方法
JPH1152850A (ja) * 1997-08-07 1999-02-26 Hitachi Ltd 暗号変換方法および装置
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KR100377175B1 (ko) * 2000-06-08 2003-03-26 주식회사 하이닉스반도체 데이터 암호화 표준 알고리즘을 이용한 암호화 장치
KR100377172B1 (ko) * 2000-06-13 2003-03-26 주식회사 하이닉스반도체 데이터 암호화 표준 알고리즘을 이용한 암호화 장치의 키스케쥴러
US20020048364A1 (en) * 2000-08-24 2002-04-25 Vdg, Inc. Parallel block encryption method and modes for data confidentiality and integrity protection
JP2003018143A (ja) * 2001-06-28 2003-01-17 Mitsubishi Electric Corp 情報処理装置
GB0121793D0 (en) * 2001-09-08 2001-10-31 Amphion Semiconductor Ltd An apparatus for generating encryption/decryption keys
EP1351430B1 (fr) * 2002-04-03 2005-10-05 Matsushita Electric Industrial Co., Ltd. Dispositif de génération d'une clé étendue, dispositif de chiffrage et système de chiffrage

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE19936918A1 (de) * 1998-09-30 2000-04-06 Philips Corp Intellectual Pty Verschlüsselungsverfahren zum Ausführen von kryptographischen Operationen
EP1006492A1 (fr) * 1998-11-30 2000-06-07 Hitachi, Ltd. Dispositif et carte à puce pour le traitement de données
WO2000039660A1 (fr) * 1998-12-28 2000-07-06 Bull Cp8 Circuit integre intelligent
EP1115094A2 (fr) * 2000-01-08 2001-07-11 Philips Corporate Intellectual Property GmbH Dispositif de traitement de données et sa méthode de mise en oeuvre
US20010012360A1 (en) * 2000-01-31 2001-08-09 Mehdi-Laurent Akkar Method of executing a cryptographic protocol between two electronic entities
DE10136335A1 (de) * 2001-07-26 2003-02-13 Infineon Technologies Ag Prozessor mit mehreren Rechenwerken

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
CHARI S ET AL: "TOWARDS SOUND APPROACHES TO COUNTERACT POWER-ANALYSIS ATTACKS", ADVANCES IN CRYPTOLOGY. CRYPTO '99. 19TH ANNUAL INTERNATIONAL CRYPTOLOGY CONFERENCE. SANTA BARBARA, CA, AUG. 15 - 19, 1999. PROCEEDINGS, LECTURE NOTES IN COMPUTER SCIENCE;VOL. 1666, BERLIN: SPRINGER, DE, 1999, pages 398 - 412, XP000911819, ISBN: 3-540-66347-9 *

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2320595A1 (fr) * 2009-11-04 2011-05-11 STMicroelectronics (Rousset) SAS Protection d'une clé de chiffrement
FR2953350A1 (fr) * 2009-11-04 2011-06-03 St Microelectronics Rousset Protection d'une cle de chiffrement

Also Published As

Publication number Publication date
DE10352680A1 (de) 2004-05-27
FR2847093B1 (fr) 2005-02-18
US20040096059A1 (en) 2004-05-20
KR20040041860A (ko) 2004-05-20
KR100456599B1 (ko) 2004-11-09

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Effective date: 20110801