FR2778253B1 - Dispositif de configuration d'options dans un circuit integre et procede de mise en oeuvre - Google Patents

Dispositif de configuration d'options dans un circuit integre et procede de mise en oeuvre

Info

Publication number
FR2778253B1
FR2778253B1 FR9805572A FR9805572A FR2778253B1 FR 2778253 B1 FR2778253 B1 FR 2778253B1 FR 9805572 A FR9805572 A FR 9805572A FR 9805572 A FR9805572 A FR 9805572A FR 2778253 B1 FR2778253 B1 FR 2778253B1
Authority
FR
France
Prior art keywords
integrated circuit
implementing method
configuring options
options
configuring
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
FR9805572A
Other languages
English (en)
Other versions
FR2778253A1 (fr
Inventor
Laurent Rochard
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics SA
Original Assignee
SGS Thomson Microelectronics SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by SGS Thomson Microelectronics SA filed Critical SGS Thomson Microelectronics SA
Priority to FR9805572A priority Critical patent/FR2778253B1/fr
Priority to US09/301,505 priority patent/US6141257A/en
Publication of FR2778253A1 publication Critical patent/FR2778253A1/fr
Application granted granted Critical
Publication of FR2778253B1 publication Critical patent/FR2778253B1/fr
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1015—Read-write modes for single port memories, i.e. having either a random port or a serial port
    • G11C7/1045—Read-write mode select circuits
FR9805572A 1998-04-30 1998-04-30 Dispositif de configuration d'options dans un circuit integre et procede de mise en oeuvre Expired - Lifetime FR2778253B1 (fr)

Priority Applications (2)

Application Number Priority Date Filing Date Title
FR9805572A FR2778253B1 (fr) 1998-04-30 1998-04-30 Dispositif de configuration d'options dans un circuit integre et procede de mise en oeuvre
US09/301,505 US6141257A (en) 1998-04-30 1999-04-28 Device for the configuration of options in an integrated circuit and implementation method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR9805572A FR2778253B1 (fr) 1998-04-30 1998-04-30 Dispositif de configuration d'options dans un circuit integre et procede de mise en oeuvre

Publications (2)

Publication Number Publication Date
FR2778253A1 FR2778253A1 (fr) 1999-11-05
FR2778253B1 true FR2778253B1 (fr) 2000-06-02

Family

ID=9525964

Family Applications (1)

Application Number Title Priority Date Filing Date
FR9805572A Expired - Lifetime FR2778253B1 (fr) 1998-04-30 1998-04-30 Dispositif de configuration d'options dans un circuit integre et procede de mise en oeuvre

Country Status (2)

Country Link
US (1) US6141257A (fr)
FR (1) FR2778253B1 (fr)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6330193B1 (en) * 2000-03-31 2001-12-11 Rambus, Inc. Method and apparatus for low capacitance, high output impedance driver
US6509756B1 (en) * 2000-03-31 2003-01-21 Rambus Inc. Method and apparatus for low capacitance, high output impedance driver
US7663915B2 (en) * 2004-02-10 2010-02-16 Semiconductor Energy Laboratory Co., Ltd. Nonvolatile memory
US20110019760A1 (en) * 2009-07-21 2011-01-27 Rambus Inc. Methods and Systems for Reducing Supply and Termination Noise
JP5653856B2 (ja) * 2011-07-21 2015-01-14 ルネサスエレクトロニクス株式会社 半導体装置

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
IT1214246B (it) * 1987-05-27 1990-01-10 Sgs Microelettronica Spa Dispositivo di memoria non volatile ad elevato numero di cicli di modifica.
US5029131A (en) * 1988-06-29 1991-07-02 Seeq Technology, Incorporated Fault tolerant differential memory cell and sensing
US5148395A (en) * 1989-04-26 1992-09-15 Exar Corporation Dual eeprom cell with current mirror differential read
US5335198A (en) * 1993-05-06 1994-08-02 Advanced Micro Devices, Inc. Flash EEPROM array with high endurance
EP0805454A1 (fr) * 1996-04-30 1997-11-05 STMicroelectronics S.r.l. Circuit de détection pour lecture et vérification du contenu d'une cellule de mémoire

Also Published As

Publication number Publication date
US6141257A (en) 2000-10-31
FR2778253A1 (fr) 1999-11-05

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