FR2765245B1 - Procede d'obtention d'une couche de silicium-germanium polycristallin sur un substrat et son application a la microelectronique - Google Patents

Procede d'obtention d'une couche de silicium-germanium polycristallin sur un substrat et son application a la microelectronique

Info

Publication number
FR2765245B1
FR2765245B1 FR9707939A FR9707939A FR2765245B1 FR 2765245 B1 FR2765245 B1 FR 2765245B1 FR 9707939 A FR9707939 A FR 9707939A FR 9707939 A FR9707939 A FR 9707939A FR 2765245 B1 FR2765245 B1 FR 2765245B1
Authority
FR
France
Prior art keywords
microelectronics
obtaining
substrate
application
polycrystalline silicon
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR9707939A
Other languages
English (en)
Other versions
FR2765245A1 (fr
Inventor
Jorge Luis Regolini
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Orange SA
Original Assignee
France Telecom SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by France Telecom SA filed Critical France Telecom SA
Priority to FR9707939A priority Critical patent/FR2765245B1/fr
Publication of FR2765245A1 publication Critical patent/FR2765245A1/fr
Application granted granted Critical
Publication of FR2765245B1 publication Critical patent/FR2765245B1/fr
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008Making conductor-insulator-semiconductor electrodes
    • H01L21/28017Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28026Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
    • H01L21/2807Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being Si or Ge or C and their alloys except Si
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/02Pretreatment of the material to be coated
    • C23C16/0272Deposition of sub-layers, e.g. to promote the adhesion of the main coating
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/22Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material

Landscapes

  • Chemical & Material Sciences (AREA)
  • Engineering & Computer Science (AREA)
  • Mechanical Engineering (AREA)
  • General Chemical & Material Sciences (AREA)
  • Organic Chemistry (AREA)
  • Metallurgy (AREA)
  • Materials Engineering (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Power Engineering (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Inorganic Chemistry (AREA)
  • Chemical Vapour Deposition (AREA)
FR9707939A 1997-06-25 1997-06-25 Procede d'obtention d'une couche de silicium-germanium polycristallin sur un substrat et son application a la microelectronique Expired - Fee Related FR2765245B1 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
FR9707939A FR2765245B1 (fr) 1997-06-25 1997-06-25 Procede d'obtention d'une couche de silicium-germanium polycristallin sur un substrat et son application a la microelectronique

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR9707939A FR2765245B1 (fr) 1997-06-25 1997-06-25 Procede d'obtention d'une couche de silicium-germanium polycristallin sur un substrat et son application a la microelectronique

Publications (2)

Publication Number Publication Date
FR2765245A1 FR2765245A1 (fr) 1998-12-31
FR2765245B1 true FR2765245B1 (fr) 1999-09-17

Family

ID=9508413

Family Applications (1)

Application Number Title Priority Date Filing Date
FR9707939A Expired - Fee Related FR2765245B1 (fr) 1997-06-25 1997-06-25 Procede d'obtention d'une couche de silicium-germanium polycristallin sur un substrat et son application a la microelectronique

Country Status (1)

Country Link
FR (1) FR2765245B1 (fr)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0867701A1 (fr) 1997-03-28 1998-09-30 Interuniversitair Microelektronica Centrum Vzw Procédé de réalisation d'un détecteur de rayonnement sensible à l'infrarouge, notamment un bolomètre sensible à l'infrarouge
US7176111B2 (en) 1997-03-28 2007-02-13 Interuniversitair Microelektronica Centrum (Imec) Method for depositing polycrystalline SiGe suitable for micromachining and devices obtained thereof
FR2804542B1 (fr) * 2000-02-01 2004-04-23 Air Liquide Procede et dispositif pour la formation de couches minces de composes de silicium et de germanium
ATE440378T1 (de) * 2000-04-05 2009-09-15 Imec Verfahren zum abscheiden eines zur mikrobearbeitung geeigneten polykristallinen sige
FR2823009B1 (fr) * 2001-04-02 2004-07-09 St Microelectronics Sa Procede de fabrication d'un transistor vertical a grille isolee a faible recouvrement de la grille sur la source et sur le drain, et circuit integre comportant un tel transistor

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2965094B2 (ja) * 1991-06-28 1999-10-18 キヤノン株式会社 堆積膜形成方法
US5273930A (en) * 1992-09-03 1993-12-28 Motorola, Inc. Method of forming a non-selective silicon-germanium epitaxial film
US5620907A (en) * 1995-04-10 1997-04-15 Lucent Technologies Inc. Method for making a heterojunction bipolar transistor

Also Published As

Publication number Publication date
FR2765245A1 (fr) 1998-12-31

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Effective date: 20130228