FR2757712B1 - Dispositif de controle de mise sous tension ou hors tension d'un circuit integre - Google Patents

Dispositif de controle de mise sous tension ou hors tension d'un circuit integre

Info

Publication number
FR2757712B1
FR2757712B1 FR9615671A FR9615671A FR2757712B1 FR 2757712 B1 FR2757712 B1 FR 2757712B1 FR 9615671 A FR9615671 A FR 9615671A FR 9615671 A FR9615671 A FR 9615671A FR 2757712 B1 FR2757712 B1 FR 2757712B1
Authority
FR
France
Prior art keywords
controlling
power
integrated circuit
integrated
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR9615671A
Other languages
English (en)
Other versions
FR2757712A1 (fr
Inventor
Francois Tailliet
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics SA
Original Assignee
SGS Thomson Microelectronics SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by SGS Thomson Microelectronics SA filed Critical SGS Thomson Microelectronics SA
Priority to FR9615671A priority Critical patent/FR2757712B1/fr
Priority to US08/993,071 priority patent/US6281723B1/en
Publication of FR2757712A1 publication Critical patent/FR2757712A1/fr
Application granted granted Critical
Publication of FR2757712B1 publication Critical patent/FR2757712B1/fr
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/22—Modifications for ensuring a predetermined initial state when the supply voltage has been applied
    • H03K17/223—Modifications for ensuring a predetermined initial state when the supply voltage has been applied in field-effect transistor switches
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/1733—Controllable logic circuits
    • H03K19/1735—Controllable logic circuits by wiring, e.g. uncommitted logic arrays

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Measurement Of Current Or Voltage (AREA)
  • Semiconductor Integrated Circuits (AREA)
FR9615671A 1996-12-19 1996-12-19 Dispositif de controle de mise sous tension ou hors tension d'un circuit integre Expired - Fee Related FR2757712B1 (fr)

Priority Applications (2)

Application Number Priority Date Filing Date Title
FR9615671A FR2757712B1 (fr) 1996-12-19 1996-12-19 Dispositif de controle de mise sous tension ou hors tension d'un circuit integre
US08/993,071 US6281723B1 (en) 1996-12-19 1997-12-18 Device and method for power-on/power-off checking of an integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR9615671A FR2757712B1 (fr) 1996-12-19 1996-12-19 Dispositif de controle de mise sous tension ou hors tension d'un circuit integre

Publications (2)

Publication Number Publication Date
FR2757712A1 FR2757712A1 (fr) 1998-06-26
FR2757712B1 true FR2757712B1 (fr) 1999-01-22

Family

ID=9498872

Family Applications (1)

Application Number Title Priority Date Filing Date
FR9615671A Expired - Fee Related FR2757712B1 (fr) 1996-12-19 1996-12-19 Dispositif de controle de mise sous tension ou hors tension d'un circuit integre

Country Status (2)

Country Link
US (1) US6281723B1 (fr)
FR (1) FR2757712B1 (fr)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6441513B1 (en) * 2000-04-13 2002-08-27 Koninklijke Philips Electronics N.V. Method and apparatus for rapid, synchronized, and isolated transistor switching
JP4480229B2 (ja) * 2000-05-29 2010-06-16 日本テキサス・インスツルメンツ株式会社 パワーオフ検出回路
US6895521B2 (en) * 2001-01-02 2005-05-17 Efficient Networks, Inc. Communication system power loss notification via detection of reverse bias state of a diode based on a threshold voltage
US6768355B1 (en) * 2001-05-03 2004-07-27 National Semiconductor Corporation, Inc. Transient rejecting circuit
JP3820913B2 (ja) * 2001-05-16 2006-09-13 ヤマハ株式会社 パワー・オン／オフ・リセット回路
US6816994B2 (en) * 2002-06-21 2004-11-09 Micron Technology, Inc. Low power buffer implementation
US6949965B1 (en) * 2003-12-02 2005-09-27 Linear Technology Corporation Low voltage pull-down circuit
US7196561B2 (en) * 2004-08-25 2007-03-27 Agere Systems Inc. Programmable reset signal that is independent of supply voltage ramp rate
TW200705172A (en) * 2005-07-21 2007-02-01 Inventec Corp Testing system and method
JP4955250B2 (ja) * 2005-10-14 2012-06-20 ルネサスエレクトロニクス株式会社 半導体装置及びそのテスト方法
US7750694B1 (en) * 2008-11-11 2010-07-06 Altera Corporation Power on reset circuitry for manufacturability and security using a fuse
US9729138B1 (en) * 2015-12-16 2017-08-08 Adesto Technologies Corporation Circuits and systems having low power power-on-reset and/or brown out detection
US9780776B1 (en) 2016-11-01 2017-10-03 Nuvoton Technology Corporation Power detector circuit using native transistor

Family Cites Families (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4716323A (en) * 1985-04-27 1987-12-29 Kabushiki Kaisha Toshiba Power voltage drop detecting circuit
USH497H (en) * 1987-01-14 1988-07-05 The United States Of America As Represented By The Secretary Of The Air Force Ratioed power on reset circuit
JP2508697B2 (ja) * 1987-03-27 1996-06-19 日本電気株式会社 半導体集積回路
US4902910A (en) * 1987-11-17 1990-02-20 Xilinx, Inc. Power supply voltage level sensing circuit
FR2641083B1 (fr) * 1988-12-22 1991-05-10 Sgs Thomson Microelectronics
US5030845A (en) * 1989-10-02 1991-07-09 Texas Instruments Incorporated Power-up pulse generator circuit
US4970408A (en) * 1989-10-30 1990-11-13 Motorola, Inc. CMOS power-on reset circuit
US5115146A (en) * 1990-08-17 1992-05-19 Sgs-Thomson Microelectronics, Inc. Power-on reset circuit for controlling test mode entry
US5164613A (en) * 1990-09-28 1992-11-17 Dallas Semiconductor Corporation Reset monitor
JP2797761B2 (ja) * 1991-07-11 1998-09-17 日本電気株式会社 パワーオン回路
US5180926A (en) * 1991-11-26 1993-01-19 Sequoia Semiconductor, Inc. Power-on reset architecture
DE59209683D1 (de) * 1992-09-30 1999-06-02 Siemens Ag Integrierte Schaltung zur Erzeugung eines Reset-Signals
JP3217498B2 (ja) * 1992-10-29 2001-10-09 富士通株式会社 半導体集積回路装置
JPH0738408A (ja) * 1993-07-19 1995-02-07 Sharp Corp バッファ回路
EP0665648A1 (fr) * 1994-01-31 1995-08-02 STMicroelectronics S.r.l. Circuit de remise sous tension pour circuit intégré
EP0700159A1 (fr) * 1994-08-31 1996-03-06 STMicroelectronics S.r.l. Circuit de détection de seuil
US5581206A (en) * 1995-07-28 1996-12-03 Micron Quantum Devices, Inc. Power level detection circuit
US5804996A (en) * 1997-02-13 1998-09-08 Ramtron International Corporation Low-power non-resetable test mode circuit

Also Published As

Publication number Publication date
FR2757712A1 (fr) 1998-06-26
US6281723B1 (en) 2001-08-28

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Legal Events

Date Code Title Description
ST Notification of lapse

Effective date: 20100831