FR2686717B1 - - Google Patents

Info

Publication number
FR2686717B1
FR2686717B1 FR9300580A FR9300580A FR2686717B1 FR 2686717 B1 FR2686717 B1 FR 2686717B1 FR 9300580 A FR9300580 A FR 9300580A FR 9300580 A FR9300580 A FR 9300580A FR 2686717 B1 FR2686717 B1 FR 2686717B1
Authority
FR
France
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
FR9300580A
Other versions
FR2686717A1 (fr
Inventor
Grochowski T Edward
Shoemaker D Kenneth
Ahmad Zaidi
Alpert B Donald
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Intel Corp
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Publication of FR2686717A1 publication Critical patent/FR2686717A1/fr
Application granted granted Critical
Publication of FR2686717B1 publication Critical patent/FR2686717B1/fr
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3818Decoding for concurrent execution
    • G06F9/3822Parallel decoding, e.g. parallel decode units
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30145Instruction analysis, e.g. decoding, instruction word fields
    • G06F9/30149Instruction analysis, e.g. decoding, instruction word fields of variable length instructions
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3836Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G06F9/3853Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution of compound instructions
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3885Concurrent instruction execution, e.g. pipeline, look ahead using a plurality of independent parallel functional units
FR9300580A 1992-01-23 1993-01-21 Microprocesseur comportant une unite pour l'execution d'instructions en parallele. Granted FR2686717A1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US82388192A 1992-01-23 1992-01-23

Publications (2)

Publication Number Publication Date
FR2686717A1 FR2686717A1 (fr) 1993-07-30
FR2686717B1 true FR2686717B1 (fr) 1995-03-03

Family

ID=25239997

Family Applications (1)

Application Number Title Priority Date Filing Date
FR9300580A Granted FR2686717A1 (fr) 1992-01-23 1993-01-21 Microprocesseur comportant une unite pour l'execution d'instructions en parallele.

Country Status (8)

Country Link
US (1) US5475824A (fr)
JP (1) JPH0628185A (fr)
CN (1) CN1074771A (fr)
DE (1) DE4301417C2 (fr)
FR (1) FR2686717A1 (fr)
GB (1) GB2263565B (fr)
HK (1) HK1006882A1 (fr)
IT (1) IT1263811B (fr)

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US6748411B1 (en) 2000-11-20 2004-06-08 Agere Systems Inc. Hierarchical carry-select multiple-input split adder
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US7363467B2 (en) * 2002-01-03 2008-04-22 Intel Corporation Dependence-chain processing using trace descriptors having dependency descriptors
US7111125B2 (en) * 2002-04-02 2006-09-19 Ip-First, Llc Apparatus and method for renaming a data block within a cache
US7051190B2 (en) * 2002-06-25 2006-05-23 Intel Corporation Intra-instruction fusion
US7398372B2 (en) * 2002-06-25 2008-07-08 Intel Corporation Fusing load and alu operations
JP3816844B2 (ja) * 2002-07-05 2006-08-30 富士通株式会社 プロセッサ及び命令制御方法
US7502910B2 (en) * 2003-01-28 2009-03-10 Sun Microsystems, Inc. Sideband scout thread processor for reducing latency associated with a main processor
US20060179275A1 (en) * 2005-02-08 2006-08-10 Takeshi Yamazaki Methods and apparatus for processing instructions in a multi-processor system
US20100115239A1 (en) * 2008-10-29 2010-05-06 Adapteva Incorporated Variable instruction width digital signal processor
JP2011008732A (ja) * 2009-06-29 2011-01-13 Fujitsu Ltd プライオリティ回路、演算処理装置及び演算処理方法
US8914615B2 (en) 2011-12-02 2014-12-16 Arm Limited Mapping same logical register specifier for different instruction sets with divergent association to architectural register file using common address format
US10437596B2 (en) * 2014-11-26 2019-10-08 Texas Instruments Incorporated Processor with a full instruction set decoder and a partial instruction set decoder
US10514925B1 (en) * 2016-01-28 2019-12-24 Apple Inc. Load speculation recovery
CN109947479A (zh) * 2019-01-29 2019-06-28 安谋科技(中国)有限公司 指令执行方法及其处理器、介质和系统
CN110780616A (zh) * 2019-09-06 2020-02-11 重庆东渝中能实业有限公司 一种基于流水线技术处理通讯命令的方法
CN112579174B (zh) * 2020-12-05 2023-01-31 西安翔腾微电子科技有限公司 一种多周期双发射指令可发射的检测电路及方法

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Also Published As

Publication number Publication date
FR2686717A1 (fr) 1993-07-30
CN1074771A (zh) 1993-07-28
ITMI930109A0 (it) 1993-01-25
ITMI930109A1 (it) 1994-07-25
JPH0628185A (ja) 1994-02-04
GB9300079D0 (en) 1993-03-03
GB2263565B (en) 1995-08-30
HK1006882A1 (en) 1999-03-19
DE4301417A1 (fr) 1993-07-29
GB2263565A (en) 1993-07-28
IT1263811B (it) 1996-09-03
US5475824A (en) 1995-12-12
DE4301417C2 (de) 1998-06-18

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