FR2675309A1 - Procede pour eliminer localement des couches isolantes transparentes aux ultraviolets, situees sur un substrat semiconducteur. - Google Patents

Procede pour eliminer localement des couches isolantes transparentes aux ultraviolets, situees sur un substrat semiconducteur. Download PDF

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Publication number
FR2675309A1
FR2675309A1 FR9202280A FR9202280A FR2675309A1 FR 2675309 A1 FR2675309 A1 FR 2675309A1 FR 9202280 A FR9202280 A FR 9202280A FR 9202280 A FR9202280 A FR 9202280A FR 2675309 A1 FR2675309 A1 FR 2675309A1
Authority
FR
France
Prior art keywords
semiconductor substrate
ultraviolet
transparent
laser
layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
FR9202280A
Other languages
English (en)
French (fr)
Other versions
FR2675309B1 (OSRAM
Inventor
Burmer Christian
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Siemens Corp
Original Assignee
Siemens Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens Corp filed Critical Siemens Corp
Publication of FR2675309A1 publication Critical patent/FR2675309A1/fr
Application granted granted Critical
Publication of FR2675309B1 publication Critical patent/FR2675309B1/fr
Granted legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76886Modifying permanently or temporarily the pattern or the conductivity of conductive members, e.g. formation of alloys, reduction of contact resistances
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105After-treatment
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76886Modifying permanently or temporarily the pattern or the conductivity of conductive members, e.g. formation of alloys, reduction of contact resistances
    • H01L21/76892Modifying permanently or temporarily the pattern or the conductivity of conductive members, e.g. formation of alloys, reduction of contact resistances modifying the pattern

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical Vapour Deposition (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Drying Of Semiconductors (AREA)
FR9202280A 1991-03-22 1992-02-27 Procede pour eliminer localement des couches isolantes transparentes aux ultraviolets, situees sur un substrat semiconducteur. Granted FR2675309A1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE4109535 1991-03-22

Publications (2)

Publication Number Publication Date
FR2675309A1 true FR2675309A1 (fr) 1992-10-16
FR2675309B1 FR2675309B1 (OSRAM) 1995-06-02

Family

ID=6428027

Family Applications (1)

Application Number Title Priority Date Filing Date
FR9202280A Granted FR2675309A1 (fr) 1991-03-22 1992-02-27 Procede pour eliminer localement des couches isolantes transparentes aux ultraviolets, situees sur un substrat semiconducteur.

Country Status (2)

Country Link
US (1) US5338393A (OSRAM)
FR (1) FR2675309A1 (OSRAM)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5843363A (en) * 1995-03-31 1998-12-01 Siemens Aktiengesellschaft Ablation patterning of multi-layered structures
KR0163526B1 (ko) * 1995-05-17 1999-02-01 김광호 자외선/오존을 조사하여 접속패드에 보호막을 형성하는 단계를 포함하는 반도체소자 제조방법
US6015735A (en) * 1998-01-13 2000-01-18 Taiwan Semiconductor Manufacturing Co., Ltd. Method for forming a multi-anchor DRAM capacitor and capacitor formed
US9299557B2 (en) * 2014-03-19 2016-03-29 Asm Ip Holding B.V. Plasma pre-clean module and process
US9474163B2 (en) 2014-12-30 2016-10-18 Asm Ip Holding B.V. Germanium oxide pre-clean module and process
US10373850B2 (en) 2015-03-11 2019-08-06 Asm Ip Holding B.V. Pre-clean chamber and process with substrate tray for changing substrate temperature

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2620737A1 (fr) * 1987-09-17 1989-03-24 France Etat Procede de gravure d'une couche d'oxyde de silicium
DE4013143A1 (de) * 1989-04-21 1990-10-31 Nippon Telegraph & Telephone Selektives (cvd)-verfahren und geraet dafuer

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6175529A (ja) * 1984-09-21 1986-04-17 Toshiba Corp ドライエツチング方法及び装置
JPH0691014B2 (ja) * 1984-11-14 1994-11-14 株式会社日立製作所 半導体装置の製造装置
JPH0763064B2 (ja) * 1986-03-31 1995-07-05 株式会社日立製作所 Ic素子における配線接続方法
US4885047A (en) * 1986-08-11 1989-12-05 Fusion Systems Corporation Apparatus for photoresist stripping

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2620737A1 (fr) * 1987-09-17 1989-03-24 France Etat Procede de gravure d'une couche d'oxyde de silicium
DE4013143A1 (de) * 1989-04-21 1990-10-31 Nippon Telegraph & Telephone Selektives (cvd)-verfahren und geraet dafuer

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
R.SOLANSKI ET AL.: "LASER PHOTODEPOSITION OF REFRACTORY METALS", APPLIED PHYSICS LETTERS., vol. 38, no. 7, April 1981 (1981-04-01), NEW YORK US, pages 572 - 574 *

Also Published As

Publication number Publication date
US5338393A (en) 1994-08-16
FR2675309B1 (OSRAM) 1995-06-02

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