FR2651626B1 - - Google Patents
Info
- Publication number
- FR2651626B1 FR2651626B1 FR909010340A FR9010340A FR2651626B1 FR 2651626 B1 FR2651626 B1 FR 2651626B1 FR 909010340 A FR909010340 A FR 909010340A FR 9010340 A FR9010340 A FR 9010340A FR 2651626 B1 FR2651626 B1 FR 2651626B1
- Authority
- FR
- France
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
- H04L9/40—Network security protocols
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- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2213/00—Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F2213/0004—Parallel ports, e.g. centronics
Landscapes
- Engineering & Computer Science (AREA)
- Computer Security & Cryptography (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Information Transfer Systems (AREA)
- Communication Control (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1019890011724A KR910008415B1 (ko) | 1989-08-17 | 1989-08-17 | 센트로닉스 호환 병렬 접속시 응답 및 비지신호 발생회로 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| FR2651626A1 FR2651626A1 (en) | 1991-03-08 |
| FR2651626B1 true FR2651626B1 (en:Method) | 1993-01-08 |
Family
ID=19289014
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| FR9010340A Granted FR2651626A1 (en) | 1989-08-17 | 1990-08-14 | Circuit for causing generation of a reception-acknowledgement signal and of a busy signal in a Centronics-compatible parallel interface |
Country Status (2)
| Country | Link |
|---|---|
| KR (1) | KR910008415B1 (en:Method) |
| FR (1) | FR2651626A1 (en:Method) |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE3751609T2 (de) * | 1986-09-01 | 1996-07-04 | Nippon Electric Co | Datenprozessor mit Hochgeschwindigkeitsdatenübertragung. |
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1989
- 1989-08-17 KR KR1019890011724A patent/KR910008415B1/ko not_active Expired
-
1990
- 1990-08-14 FR FR9010340A patent/FR2651626A1/fr active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| KR910008415B1 (ko) | 1991-10-15 |
| KR910005172A (ko) | 1991-03-30 |
| FR2651626A1 (en) | 1991-03-08 |