FR2641391B1 - Composant logique programmable effacable rapide - Google Patents

Composant logique programmable effacable rapide

Info

Publication number
FR2641391B1
FR2641391B1 FR8917242A FR8917242A FR2641391B1 FR 2641391 B1 FR2641391 B1 FR 2641391B1 FR 8917242 A FR8917242 A FR 8917242A FR 8917242 A FR8917242 A FR 8917242A FR 2641391 B1 FR2641391 B1 FR 2641391B1
Authority
FR
France
Prior art keywords
programmable logic
logic component
erase programmable
quick erase
quick
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR8917242A
Other languages
English (en)
Other versions
FR2641391A1 (fr
Inventor
J. Allen Michael
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Intel Corp
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Publication of FR2641391A1 publication Critical patent/FR2641391A1/fr
Application granted granted Critical
Publication of FR2641391B1 publication Critical patent/FR2641391B1/fr
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1015—Read-write modes for single port memories, i.e. having either a random port or a serial port
    • G11C7/1036—Read-write modes for single port memories, i.e. having either a random port or a serial port using data shift registers
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1051—Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H03K19/17704—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form the logic functions being realised by the interconnection of rows and columns
    • H03K19/17708—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form the logic functions being realised by the interconnection of rows and columns using an AND matrix followed by an OR matrix, i.e. programmable logic arrays
    • H03K19/17712—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form the logic functions being realised by the interconnection of rows and columns using an AND matrix followed by an OR matrix, i.e. programmable logic arrays one of the matrices at least being reprogrammable

Landscapes

  • Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Logic Circuits (AREA)
FR8917242A 1988-12-30 1989-12-27 Composant logique programmable effacable rapide Expired - Fee Related FR2641391B1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/292,462 US4930098A (en) 1988-12-30 1988-12-30 Shift register programming for a programmable logic device

Publications (2)

Publication Number Publication Date
FR2641391A1 FR2641391A1 (fr) 1990-07-06
FR2641391B1 true FR2641391B1 (fr) 1994-02-04

Family

ID=23124783

Family Applications (1)

Application Number Title Priority Date Filing Date
FR8917242A Expired - Fee Related FR2641391B1 (fr) 1988-12-30 1989-12-27 Composant logique programmable effacable rapide

Country Status (5)

Country Link
US (1) US4930098A (fr)
JP (1) JPH02226812A (fr)
FR (1) FR2641391B1 (fr)
GB (1) GB2226904B (fr)
HK (1) HK1000480A1 (fr)

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5017809A (en) * 1989-10-23 1991-05-21 Advanced Micro Devices, Inc. Method and apparatus for program verification of a field programmable logic device
JP2726529B2 (ja) * 1989-12-08 1998-03-11 川崎製鉄株式会社 プログラマブル論理素子
US5247213A (en) * 1990-05-08 1993-09-21 Advanced Micro Devices, Inc. Programmable sense amplifier power reduction
US5247195A (en) * 1991-07-26 1993-09-21 Advanced Micro Devices, Inc. PLDs with high drive capability
KR960003042B1 (ko) * 1992-05-26 1996-03-04 가부시끼가이샤 도시바 데이타 출력 장치
US5432388A (en) * 1992-08-27 1995-07-11 At&T Global Information Solutions Company Repeatedly programmable logic array using dynamic access memory
US5497475A (en) * 1993-02-05 1996-03-05 National Semiconductor Corporation Configurable integrated circuit having true and shadow EPROM registers
KR100256322B1 (ko) * 1994-03-03 2000-05-15 제니 필더 파울러-노드하임 프로그래밍 및 이레이즈를 이용한 저전압 단일트랜지스터 플래쉬 이이피롬셀
US5592681A (en) * 1994-06-14 1997-01-07 Texas Instruments Incorporated Data processing with improved register bit structure
JPH11118883A (ja) * 1997-10-20 1999-04-30 Kawasaki Steel Corp 半導体集積回路およびそのテスト方法
CN100489797C (zh) * 2001-10-11 2009-05-20 阿尔特拉公司 可编程逻辑设备上的错误检测
US7254157B1 (en) * 2002-03-27 2007-08-07 Xilinx, Inc. Method and apparatus for generating a phase locked spread spectrum clock signal
US6842039B1 (en) 2002-10-21 2005-01-11 Altera Corporation Configuration shift register
US7328377B1 (en) 2004-01-27 2008-02-05 Altera Corporation Error correction for programmable logic integrated circuits
US7183801B2 (en) * 2004-09-08 2007-02-27 Atmel Corporation Programmable logic auto write-back
TWI446715B (zh) * 2011-01-03 2014-07-21 Etron Technology Inc 具有雙輸入緩衝器切換功能的輸入緩衝系統及其方法

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4124899A (en) * 1977-05-23 1978-11-07 Monolithic Memories, Inc. Programmable array logic circuit
JPS60204118A (ja) * 1984-03-28 1985-10-15 Toshiba Corp 任意の論理関数を実現する方法及び装置
US4713792A (en) * 1985-06-06 1987-12-15 Altera Corporation Programmable macrocell using eprom or eeprom transistors for architecture control in programmable logic circuits
US4774421A (en) * 1984-05-03 1988-09-27 Altera Corporation Programmable logic array device using EPROM technology
US4617479B1 (en) * 1984-05-03 1993-09-21 Altera Semiconductor Corp. Programmable logic array device using eprom technology
US4609986A (en) * 1984-06-14 1986-09-02 Altera Corporation Programmable logic array device using EPROM technology
US4761768A (en) * 1985-03-04 1988-08-02 Lattice Semiconductor Corporation Programmable logic device
US4684830A (en) * 1985-03-22 1987-08-04 Monolithic Memories, Inc. Output circuit for a programmable logic array
US4763020B1 (en) * 1985-09-06 1997-07-08 Ricoh Kk Programmable logic device having plural programmable function cells

Also Published As

Publication number Publication date
FR2641391A1 (fr) 1990-07-06
GB2226904B (en) 1992-11-04
HK1000480A1 (en) 1998-03-27
US4930098A (en) 1990-05-29
GB2226904A (en) 1990-07-11
GB8923815D0 (en) 1989-12-13
JPH02226812A (ja) 1990-09-10

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Legal Events

Date Code Title Description
TP Transmission of property
ST Notification of lapse

Effective date: 20070831