FR2568034A1 - Multiplicateur numerique - Google Patents

Multiplicateur numerique Download PDF

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Publication number
FR2568034A1
FR2568034A1 FR8511082A FR8511082A FR2568034A1 FR 2568034 A1 FR2568034 A1 FR 2568034A1 FR 8511082 A FR8511082 A FR 8511082A FR 8511082 A FR8511082 A FR 8511082A FR 2568034 A1 FR2568034 A1 FR 2568034A1
Authority
FR
France
Prior art keywords
cell
numbers
bit
multiplier
multiplier according
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
FR8511082A
Other languages
English (en)
French (fr)
Inventor
Richard Charles John Hicks
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Ferranti International PLC
Original Assignee
Ferranti PLC
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ferranti PLC filed Critical Ferranti PLC
Publication of FR2568034A1 publication Critical patent/FR2568034A1/fr
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/52—Multiplying; Dividing
    • G06F7/523—Multiplying only
    • G06F7/525—Multiplying only in serial-serial fashion, i.e. both operands being entered serially
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2207/00—Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F2207/38—Indexing scheme relating to groups G06F7/38 - G06F7/575
    • G06F2207/3804—Details
    • G06F2207/386—Special constructional features
    • G06F2207/3884—Pipelining
    • G06F2207/3892—Systolic array

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Complex Calculations (AREA)
  • Image Processing (AREA)
FR8511082A 1984-07-21 1985-07-19 Multiplicateur numerique Pending FR2568034A1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB8418673A GB2162345B (en) 1984-07-21 1984-07-21 Digital multiplier

Publications (1)

Publication Number Publication Date
FR2568034A1 true FR2568034A1 (fr) 1986-01-24

Family

ID=10564283

Family Applications (1)

Application Number Title Priority Date Filing Date
FR8511082A Pending FR2568034A1 (fr) 1984-07-21 1985-07-19 Multiplicateur numerique

Country Status (6)

Country Link
JP (1) JPS6136840A (sv)
DE (1) DE3525558A1 (sv)
FR (1) FR2568034A1 (sv)
GB (1) GB2162345B (sv)
NL (1) NL8502077A (sv)
SE (1) SE8503528L (sv)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0197122B1 (en) * 1984-10-16 1992-08-12 The Commonwealth Of Australia A cellular floating-point serial-pipelined multiplier

Non-Patent Citations (3)

* Cited by examiner, † Cited by third party
Title
ALTA FREQUENZA, vol. 37, no. 11, novembre 1968, pages 1079-1086, Milan, IT; L. DADDA et al.: "Digital multipliers: a unified approach" *
IEEE JOURNAL OF SOLID-STATE CIRCUITS, vol. SC-11, no. 5, octobre 1976, pages 669-678, New York, US; J. KANE: "A low-power, bipolar, two's complement serial pipeline multiplier chip" *
IEEE TRANSACTIONS ON COMPUTERS, vol. C-32, no. 2, février 1983, pages 194-198, IEEE, New York, US; F.P. PREPARATA: "A mesh-connected area-time optimal VLSI multiplier of large integers" *

Also Published As

Publication number Publication date
JPS6136840A (ja) 1986-02-21
SE8503528D0 (sv) 1985-07-19
GB8418673D0 (en) 1984-09-12
DE3525558A1 (de) 1986-01-30
SE8503528L (sv) 1986-01-22
GB2162345A (en) 1986-01-29
NL8502077A (nl) 1986-02-17
GB2162345B (en) 1987-07-01

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