FR2565031B1 - Procede de realisation d'un blindage entre deux sous-ensembles d'un microcircuit et application de ce procede a la realisation d'un circuit integre monolithique comprenant deux sous-ensembles ainsi isoles - Google Patents
Procede de realisation d'un blindage entre deux sous-ensembles d'un microcircuit et application de ce procede a la realisation d'un circuit integre monolithique comprenant deux sous-ensembles ainsi isolesInfo
- Publication number
- FR2565031B1 FR2565031B1 FR8408254A FR8408254A FR2565031B1 FR 2565031 B1 FR2565031 B1 FR 2565031B1 FR 8408254 A FR8408254 A FR 8408254A FR 8408254 A FR8408254 A FR 8408254A FR 2565031 B1 FR2565031 B1 FR 2565031B1
- Authority
- FR
- France
- Prior art keywords
- assemblies
- sub
- microcircuit
- shield
- isolated
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 238000004519 manufacturing process Methods 0.000 title 2
- 238000000034 method Methods 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
- H01L27/0605—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits made of compound material, e.g. AIIIBV
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
- H01L23/585—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries comprising conductive layers or plates or strips or rods or rings
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Semiconductor Integrated Circuits (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR8408254A FR2565031B1 (fr) | 1984-05-25 | 1984-05-25 | Procede de realisation d'un blindage entre deux sous-ensembles d'un microcircuit et application de ce procede a la realisation d'un circuit integre monolithique comprenant deux sous-ensembles ainsi isoles |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR8408254A FR2565031B1 (fr) | 1984-05-25 | 1984-05-25 | Procede de realisation d'un blindage entre deux sous-ensembles d'un microcircuit et application de ce procede a la realisation d'un circuit integre monolithique comprenant deux sous-ensembles ainsi isoles |
Publications (2)
Publication Number | Publication Date |
---|---|
FR2565031A1 FR2565031A1 (fr) | 1985-11-29 |
FR2565031B1 true FR2565031B1 (fr) | 1986-09-05 |
Family
ID=9304417
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR8408254A Expired FR2565031B1 (fr) | 1984-05-25 | 1984-05-25 | Procede de realisation d'un blindage entre deux sous-ensembles d'un microcircuit et application de ce procede a la realisation d'un circuit integre monolithique comprenant deux sous-ensembles ainsi isoles |
Country Status (1)
Country | Link |
---|---|
FR (1) | FR2565031B1 (fr) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2682836A1 (fr) * | 1991-10-18 | 1993-04-23 | Philips Electronique Lab | Circuit integre monolithique incluant plusieurs blocs fonctionnels couples entre eux, en hautes et/ou hyperfrequences, et une ligne de distribution de tension continue. |
Family Cites Families (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE2656489C3 (de) * | 1976-12-14 | 1984-09-20 | Standard Elektrik Lorenz Ag, 7000 Stuttgart | Leiterplatte für eine Hochfrequenz- Schaltungsanordnung |
JPS5884455A (ja) * | 1981-11-13 | 1983-05-20 | Fujitsu Ltd | 半導体記憶装置 |
-
1984
- 1984-05-25 FR FR8408254A patent/FR2565031B1/fr not_active Expired
Also Published As
Publication number | Publication date |
---|---|
FR2565031A1 (fr) | 1985-11-29 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
ST | Notification of lapse |