FR2521297A1 - SIGNAL ANALYZER FOR PARTS DEFECT DETECTOR - Google Patents

Abstract

THE INVENTION RELATES TO A SIGNAL ANALYZER FOR ANALYZING THE ECHO SIGNALS GENERATED BY AN ULTRASONIC DETECTOR OF FAULTS, IN PARTICULAR CRACKS, OF PARTS TO UNDERGO A NON DESTRUCTIVE CHECK. THE ANALYZER INCLUDES SEVERAL 10 SIGNAL PROCESSING CHANNELS, EACH CHANNEL INCLUDING A 12-PEAK SAMPLING AND HOLDING CIRCUIT WHICH RETAINS THE SIGNAL'S PEAK VALUE IN THE RESPECTIVE TIME SLOT, AN ANALOGUE FILTER WHICH THE SIGNAL IS REPRESENTED. THE MEDIUM LEVEL OF THE BASIC ECHO, A FIRST DIFFERENTIAL AMPLIFIER 44 SERVING AS A COMPARATOR AND WHOSE OUTPUT SIGNAL REPRESENTS THE DIFFERENCE BETWEEN THE OUTPUT SIGNALS OF THE MAINTAIN CIRCUIT AND OF THE FILTER, AS WELL AS A SECOND DIFFERENTIAL AMPLIFIER, COMPARATOR 46, WHICH RECEIVES THE OUTPUT SIGNAL OF THE FIRST COMPARATOR 44, AND A THRESHOLD SIGNAL; THE SIGNAL PROCESSING CHANNELS ARE CONTROLLED THROUGH A CLOCK 14, AN OFFSET REGISTER 12 AND A GATE CIRCUIT 38.

Description

25212.

  The present invention relates to an analyzer for the purpose of analyzing and analyzing the electrical signals generated by an ultrasonic detection of defects, such as cracks, used for: non-destructive testing of parts, in particular the turbine blades of gas turbine engines.

  Internal defects such as cracks, which constitute

  essentially kill weakening in the structure of such parts, occur during the processing of the

  raw material, during the manufacture of the piece and

  the service life of the part The detection of these cracks is essential, in particular in the case of part E

  heavily stressed, such as turbine disks.

  If the position and the dimensions of the crack (es) are known, the application of modern methods of mechanical definition of rupture makes it possible to determine with considerable precision the service life which can be expected.

for the piece.

  A common method of non-destructive disk control

  of turbines to detect internal cracks

  merge the disc in a water bath, rotate the disc and expose the disc to ultrasonic pulses emitted

  by an ultrasonic probe, which is moved slowly

  the top of the disk Each pulse is reflected by the part in the form of a succession of echoes, including echoes from the front and rear surfaces of the part, an echo of variable size called "base echo", resulting from the

  grain structure of the material of the part and, if the impulse

  sion was issued on a cove, there is an echo cor-

  responding to the creek The size of the creek is in

  relationship with the magnitude of the corresponding echo.

  pulse was emitted in the area of a cross-sectional variation of the piece, there are also other echoes

  called "geometric echoes".

  All these echoes are displayed on a screen and the opera-

  should recognize an echo which is momentarily increasing

  above the level of the base echo, when the crack passes below the probe and disappears again The most critical case is where a crack occurs in the area of a sectional variation and where the echo is hidden by the geometric echo; for example, the crack echo signal may momentarily occur on the back edge of the relatively large geometric echo signal. Visual detection of such a crack requires considerable concentration for long periods of time, experience and skill. of Pattern Recognition A momentary loss of concentration could mean that he has passed a

crack undetected.

  The present invention aims to provide a device

  which processes and analyzes the signals produced by echoes

  coming from a part subjected to an ultrasonic

  destructive, so that a magnitude and a crack echo position, especially in the area of section changes, are indicated and recorded without the need for continuous visual monitoring

echo signals.

  In accordance with the present invention, there is provided a

  signal analyzer comprising a plurality of processing channels

  signals, each channel being arranged to receive

  signals to be analyzed by means of a means of

  niche, any means of niche establishment that may be solicited by a

  niche to allow the signal to be analyzed sequentially

  each channel, each channel comprising a hold circuit arranged to receive and maintain the peak value of the signal in the respective time slot, an average value setting filter arranged to receive the

  output signal of the holding circuit, a first comparison

  the output signal of the first comparator being transmitted to a second comparator which also receives a threshold level signal, the output signal of the first comparator being transmitted to a second comparator which also receives a threshold level signal; second comparator being used to determine whether the signal from the

  comparator is or is not significant and, in the case of

  firmative, to record the output signal of the first comparator. The output signal of the second comparator may be applied to an analog-to-digital converter (AD) which allows the output of the first comparator to be converted to digital form if the output signal of the first comparator is greater than the threshold level. Preset The converted data can be transmitted to a data bus via a tri-state buffer, the

  data bus being connected to a memory of the type "first-

  input-first-out ", from which the data can be transmitted to a visual display and a printer

  and / or a computer for data analysis.

  The signal analyzer can be adapted in particular to analyze the echo signals generated by an ultrasonic crack detector in which regular pulses of ultrasonic energy are directed to a part for

  The input signal applied to the analyzer com-

  takes echo signals from the room and these

  The signals are preferably processed by a variable attenuator and a logarithmic amplifier before going into the signal processing channels via the

means of niche establishment.

  The means of establishing a slot may include a

  variable frequency clock circuit which produces im-

  tripping pulses of a selected width, and a

  shift register, the clock circuit being actuated by

  a pulse emitted by the crack detector through

  a delay element, or directly by the front wall echo signal from the part under control The clock circuit can produce tripping pulses of uniform width, the width of which can be altered by the operator, or trigger pulses can be produced by a second clock circuit where the width of the trigger pulses can be a function of the power of the echo signal so that the geometric echoes can reduce the width of the echo signal. trigger pulse by allowing a

  advanced examination of geometric echoes.

  25212 e 7 The output signal of the first comparator represents the decibel signal (d B) above the "base" level and, if this signal is above the threshold level, the second comparator recognizes the signal as constituting a signal. crack signal and it forces the analog-to-digital converter to convert the signal into a digital form The crack dimension data as well as the crack depth, under

  the form of numbers of pulses coming from the hor-

  uniform box, are applied to the memory "first-in-

  first-out (FIFO ", visual display device and printer and / or computer The visual display device and printer and / or computer also receive data indicating the total number of cracks detected and the printer and / or computer receives data from a mechanical detection system provided in the tester and indicating the position of the crack. analog or digital and, in the analog form, the first and second comparators comprise a differential amplifier and an analog comparator,

  while the holding circuit comprises a capacitor circuit

  citif which may include a capacitor and a buffer.

  In digital form, the comparators are both digital comparators, the sustain circuit

  includes a numeric register-and a single converter-

  analog-digital substitutes the converters in the individual processing channels, and is arranged to convert the input signal from the detector of

  cracks before its transmission to each treatment channel.

  Other features and benefits of this

  invention will be highlighted in the following description.

  tion, given by way of non-limiting example, with reference

  in the accompanying drawings, in which:

  Fig 1 is a typical echo curve giving the impression of

  amplitude of the echo signal as a function of time; Fig. 2 shows on an enlarged scale a part of the echo curve for a section change in the room, without the presence of a crack signal;

  Fig 3 is similar to Fig 2, but with the pre-

  presence of a crack signal; Fig. 4 is a block diagram of a form of signal analyzer according to the present invention; Fig. 5 is a block diagram of one of the analog signal processing channels of the analyzer shown in Fig. 4; Fig. 6 shows the signal waveforms at different points along the channel shown in Fig. 5; Fig. 7 is a diagram showing the analyzer of Fig. j connected to a crack detector and a non-control device; -destructive; and Fig. 8 is a block diagram of a digital form

  of the signal processing channel shown in FIG.

  FIG. 1 represents a curve corresponding to an echo received from a room comprising a section change. The signals A and B are the echo signals received from the front and rear walls of the room, the signal C and the signal from the section change and called a geometric echo and furthermore there is a signal D which represents the bottom echoes resulting from the grain structure of the part, this signal being called

"basic signal".

  FIG. 2 shows on a larger scale the trailing edge of the train of relatively large and damped oscillations of the geometric echo C. Existing methods

  location of cracks requires the operator to recognize the

  birth of the creek in the form of an additional signal

  The signal analyzer according to the invention proposes to examine the geometric echo signal as shown in FIG.

  in a series of slots of variable temporal duration.

  Figs 2 and 3 together show the effect of using

  different widths of control pulse or

Tripping.

  In Fig. 2, the peak signal in a pulse

  command time of a duration tl, corresponds to one of the os-

  In FIG. 3, for a cren E of the same duration, the peak signal is the same as in FIG.

  the fact that although a crack signal E has appeared during

  the duration of the slot, it is less than the ad-

underlying geometric echo.

  FIG. 2 also shows the operating conditions obtained with a narrow control pulse of a duration t 2, and the peak signal appearing in this slot.

  corresponds to the next lower cycle of the geometric echo.

  In Fig. 3, the crack echo E appearing in the same narrow slot rises above the value recorded in the narrow slot of Fig. 2 and, provided that the crest echoes a predetermined threshold level, which is a certain level above the "base" level, the creek is

recognized and registered.

  As will be described in more detail below, the analyzer can use narrow control pulses of around 100 ns in the geometric echo area and larger control pulses in other areas. The operator can choose to use one of

  two clock generators to control the width of im-

  drive pulse, a uniform clock or a clock

  commanded by the echo dimension and which generates impulses

  periods of time until an echo

  substantial, for example a geometric echo is received.

  The instantaneous size of the received signal determines the instantaneous duration of the clock pulses, and hence the control pulses, which are narrower when

  produces echoes of greater amplitude.

  Fig 4 shows in block diagram form the main components of the analyzer and the peripheral recording and display devices, the analyzer

  being controlled in its simplest operating mode.

  The main component of the analyzer consists of a group of signal processing channels 10 which receive the echo signals from the part being controlled. The channels are controlled by a shift register 12 which generates the pulses. control and by a uniform clock of adjustable pulse width 14 which ensures the shift of a logic "1" through the register the clock being triggered by the surface echo signal

  from the room The logical "1" opens successfully

  the door of each channel.

  Significant data from channels 10,

  that is, data indicating the presence and the

  of a crack, are recognized for a detection circuit

  16 and this causes the data to be applied to a "first-in-first-out" memory (FIFO). At the same time, the data detection circuit makes the output signal of a depth meter 20, indicating the depth of a crack by a number of slots

  time appearing at the output of the clock 14,

plicated to the FIFO memory 18.

  The data detection circuit 16 also applies analysis coordinates in an independent FIFO memory. The analysis coordinates are obtained from position transducers incorporated into the analysis system.

  These coordinates are normally decimal numbers.

  binary coded problems (BCD) or binary numbers and,

  in the case where the part is a turbine disk, they represent

  feel the instantaneous position of the ultrasonic probe relative to the disk, namely by the distance from the center (radius) and by the rotation from a reference mark (angle) The data detection circuit 16, besides it ensures the loading of the FIFO memories, also applies

  a pulse at a crest counter 26.

  The data from the FIFO memory 18 is transmitted

  put through data buses 28 and 39 to a dis

  display 32 and the printer 24 and / or the computer

  34 The printer and / or the computer also receive data from the FIFO 22 via a data bus from the crypt counter 26 via a data bus 36. data bus 37 The complete set of data relating to each crack has a dimension expressed in d B, a depth expressed in number of time slots a radius expressed in millimeters or inches, and an angle 2521297 l expressed in degrees, this together being printed, together with the total number of cracks, by the printer 24 at a

  rate of about one line per second If the display time

  is set at a different rate, the system allows the printer to run at its own speed, independently

display system.

  The FIFO memory 18 is used as a temporary memory.

  to adapt the fast acquisition possible from a localized area of the disk at a relatively slow speed

  which is necessary for display and recording.

  The capacity of the memory is adapted to the possible number of

  cracks and, in the case of a turbine disk, since only

  One or two creeks are likely to be encountered in

  the most unfavorable case, memory has the ability to memo-

  As soon as the cracks data are loaded into the FIFO memory, they appear on the display device 32

  a time determined by the display time command.

  At the end of this period, the new data series

  in the FIFO memory is displayed, and so on.

  If a group of faults causes an increase to a rapid succession of cracks data from the signal processing channels 10, the data groups are temporarily stored in the FIFO memory and

  are transmitted to the display device at an appropriate rate

  which is determined by the operator If the FIFO is temporarily filled, or if the operator does not

  not pay attention to the crack indicated on the device.

  If the record number is 30, the total number of detected cracks can be

  verified by the creep account appearing on the

display.

  The display device does not indicate the analysis coordinates because they are usually displayed by the disk analysis system, but they are recorded

  on the printer 24 and / or in the computer 34.

  With reference to FIGS. 5, 6 and 7, each processing channel

  10 comprises a trigger circuit 38, a peak and hold sampling circuit 40, i which comprises a capacitor and a gain equal amplifier.

  per unit, an averaging filter 42, an amplifier

  differential indicator 44, a comparator 46, an analog-to-digital converter (A-D) 48 and a tri-state buffer 50 whose output signal is transmitted through the data bus connected to the data detection circuit 16

and to the FIFO memory 18.

  The signal processing channels 10 are arranged in parallel and receive successively processed echo signals from the room. The echo signals are first attenuated or amplified by a variable gain device.

  54 which sets the signal level to a most appropriate value.

  required for a logarithmic amplifier 56 whose output voltage represents the logarithm of its input voltage

  and therefore represents the input voltage in decibels.

  The tripping circuits 38 of the channels are open successfully.

  in such a way that each door of the circuit corre-

  The triggering or gating circuits are controlled by the shift register 12, which is in turn controlled by the variable uniform clock 14 or by a clock controlled by the dimmer. echo 58 Clock circuits 14

  and 58 has switches allowing the clock to

  pective to ensure the activation of the shift register 12.

  However, the clock 14 continues to operate the depth counter 20 when the clock 58 is in use. Both clocks can be triggered by the echo

  front wall through the trigger circuit.

  Alternatively, both clocks can be triggered by the transmitter pulse after a delay.

  established by the delay element 60.

  The control signal of a particular gate, provided by the shift register, is also used to reset the analog-to-digital converter of this gate, and the signal from the previous gate is used for resetting the gate. peak sampling and holding circuit 40 and for the validation of the tri-state buffer 50 The analyzer is arranged to receive

  signals from a crack detector 62 which can also

  There is also an associated oscilloscope 64, and also signals from position indicating devices (not shown) which indicate the position of a probe 66 relative to a workpiece 68 which is immersed in a water reservoir 70. slot or gate establishment circuit 38 allows the associated signal processing channel 10 to examine

  the ultrasonic echo signal from a horizontal section

  Figure 5 shows the waveforms of the signal in different positions along the processing channel The waveform (i) defines the display of the electronic signals from the crack detector , these signals being repeated several times to show the result of changes in the echoes received when the disc rotates. The time base has been shown compressed.

to facilitate the presentation.

  The waveform (ii) corresponds to the waveform of im-

  drive pulse that is displayed.

  Waveform (iii) represents only one of the

  control impulses, that is to say the one that opens the door

  in the channel shown in Fig 5.

  Waveform (iv) shows the voltage appearing in the capacitor of the peak sampling circuit

  and hold 40 and it corresponds to the output of the amplifier

  gain indicator equal to the unit with high input impedance

  which acts as a buffer When the door 38 opens, the

  denser charges up to the peak signal voltage

  ultrasonic that occurs during the slot interval.

  In a, the signal corresponds to the level of "basic echo" and it

  is momentarily at a low value The capacitor

  holds this value low until the door opens

  again, in the next repetition period, in b.

  In b, the level of 'base echo' is higher, and this higher level is maintained up to c In c, an even higher value is entered up to d In d, the echo level of The base "decreases, and a lower value is maintained up to e In e, there is an echo of crack, and it follows that a much higher value must be maintained

until f.

  The waveform (v) corresponds to the output of the averaging filter 42, which has a time constant of about 0.1 second, and which filters trace variations.

  by-trace appearing in the signal level, in

  an average value of the basic echo level.

  The output signal of the differential amplifier 44 is the difference between the last signal level held by the peak and hold sampling capacitor and the average base echo level. All signal voltages represent the last level of signal in decibels above the base level, so that the waveform (vi) represents the last signal level in "db above the base level" The relatively small signal level changes for the form (iv) ensure that

  the value of "db above the base level" becomes lightly

  negatively or positively This has no influence on

the comparator 46.

  However, an echo signal large enough to be interpreted as a crack (e for the waveform; iv makes the signal "db above the base level"

  exceeds the predetermined threshold level at the entry of the

  controller 46, which then engages the analog converter

digital 48.

  The analog-to-digital converter 48 converts the signal from "db above the base level" to a corresponding 6-bit binary number, and a maximum time of 80 pw is required to perform this operation. The waveform

  (vii) shows that the output of the analogue-digital converter

  It is connected to the data bus via the tri-state buffer 50 for the duration of the control pulse of the preceding channel in the next repetition period. The digital analog converter is then available to receive an input signal in the same state. next cycle. The ultrasonic probe moves only slowly over the face of the disc and section changes are

  detected slowly by the ultrasonic analysis system.

  As a result, even when the disc is positioned

  Actually, a complete revolution is required to bring a new edge below the probe, this requiring for the maximum control speeds a time of the order of one second. If a geometric echo occurs in the range of the signal processing channel shown in Fig. 5, the geometric echo has an effect similar to small changes in the basic echo level appearing in the

  zonecomprise between a and d for the waveform (iv) of FIG.

  The power of the echo signal only increases slowly and the low-pass filter 42, which has a time constant of 0.1 second, effectively tracks the increasing signal strength. As a result, the signal of "d B above the base level "remains too small to go beyond the threshold

  geometric echoes are ignored.

  The analyzer receives two input signals, namely the ultrasonic signal to be processed (VIDEO IN), and a trigger signal (TRIG IN), and it provides three output signals, two of which facilitate the adjustment of the operation of the These signals are constituted by the output signal of the logarithmic amplifier 56 (VIDEO OUT), and by the control pulses, represented by the waveform (ii) in FIG. 6. The third output signal corresponds to the multi-channel connection with

  the printer 24 and / or the computer 34.

  The signals to be processed are rectified and filtered ultrasonic signals and essentially constitute the signals displayed on the oscilloscope screen of the detector of

creeks.

  The input signal TRIG IN must be a trigger signal which is synchronized with the transmitter output pulse from the crack detector, or which must differ from this pulse by a small fixed time interval. tripping occurring shortly before the transmitter pulse can be accepted by setting the delay control (Fig 7) A subsequent trigger pulse must occur before the echo

2 L 21 9

  from the top surface of the disc, if we use

  the operating mode with triggering control pulses

echoed.

  The VIDEO OUT output signal can be represented by the oscilloscope 64 together with the control pulses to verify the correct triggering of the control pulses in relation to the echo from the front wall of the disk. The width of the control pulses can be set to ensure that the control pulse train includes all the ultrasonic signals of interest The operator can also verify that the gain settings made on the crack detector and on the analyzer are such that cracks contained in the disc produce

  VIDEO OUT signals having a correct dynamic range.

  The width of the control pulses can be adjusted to ensure that the control pulse train includes all the ultrasonic signals of interest. The operator can also control that the gain settings made on the crack detector and the analyzer are such as creeks appearing in the disc produce signals

  VIDEO OUT having the correct dynamic range.

  The analyzer can be operated in a number of different ways depending on the purpose of the analyzer.

  achieve and the procedure is determined by the

  Analyzer control settings (Figure 7).

  In the first mode of operation, which has been described above

  above, the mode control is set in the normal condition, the control pulse width is set to a uniform value and the pulse

  command is set for echo triggering.

  The first control pulse is triggered by the first echo pulse received at the VIDEO IN input after the trigger pulse has been received at the TRIG IN input. The control pulses all have the same duration and their width can be adjusted. to be adjusted using -the slot pulse width command between 100 ns

and 1.0 ps.

  w For convenience, the GATE PULSE output should be displayed, along with the ultrasonic signals, on the crack detector screen 62 so that (a) it can be verified that the control pulses begin when the the echo arrives from the upper surface of the part, and (b) the uniform width control can be adjusted so that the control pulse train contains all the interesting ultrasonic echoes, and the slot width has a suitable value for a depth calibration Alternatively, the VIDEO OUT and GATE PULSE outputs can be displayed on an oscilloscope 64

  so that processes (a) and (b) can be carried out

  you are. The input gain switch is used to bring the VIDEO OUT signals within the dynamic range of the analyzer. The rotational speed of the workpiece 68 is adjusted so that when the repetition frequency of pulses of the crack detector, a crack is observed

  at least three times when it passes below the probe.

  The crack echo dimension is indicated in decibels above the average base echo level, provided that this value exceeds the set value of the

  every time a crack is detected, the depth

  the corresponding degree of crack is displayed and, in this uniform mode, the depth is measured in

  time corresponding to the control pulses.

  The crack is also added to the crack count.

  In the normal mode, the triggering of the control pulses can be delayed so that the first pulse

  order is triggered after a delay following the

  Trigger pulse TRIG IN The delay time is set using the delay command and the start of the control pulses can be checked according to the

  ultrasonic signals as before.

  Also, in the normal mode, the control pulse width can be controlled by the echo dimension, in

  using the echo dimension controlled clock 58.

  Regardless of how the first control pulse is triggered, the control pulse width is then set by the width control as a function of

  the echo dimension between the limits of 100 ns and 1.0 ps.

  The width is also affected by the amplitude of the ultrasonic signals, large signals causing a reduction in width, the minimum acceptable width being still 100 The sensitivity control and the associated width control are used to adjust the pulse train

* Clock so as to adapt it to all

  interesting sounds and, at the same time, to ensure that narrow control pulses are generated

  whenever geometric echoes occur in relation to

  The depth of the cracks is further measured in terms of the number of pulses from the uniform clock. The analyzer can be used to examine the signals,

  in a slot or selectable time slot

  This is achieved by setting the mode switch to echo signals and selecting the desired number of slots. The analyzer now displays only cracks occurring in the selected time slot or slot. command is unifoi the time intervals are identical to the numbers of

  slots, depending on the selection that can be made.

  If the control pulse width is controlled according to the echo dimension, the slot number switch can be used to select the number of slots for the crack to be displayed. For a crack of a given depth, its number slots are a function of the width sensitivity controls If there is a crack in this slot, its depth is still displayed

  in terms of the time intervals provided by the clock

  form. In the embodiment shown in FIG. 8, each channel 10 comprises digital devices at the

  analog devices and the analogue converter

  Digital Channel 48 is removed in each channel.

  Input signals from the crack detector, after being processed by the gain adjusting element

  input 54 are applied to an analog converter

  digital 72 before reaching each channel 10, so that the signals are now delivered to the channels

in a digital form.

  The channel components 10 now include a digital register 74 which forms the write and hold sampling circuit, a digital averaging filter 76, a first digital comparator 78, and a digital register 74.

second digital comparator 80.

  The first digital comparator corresponds to the ampli-

  differential indicator 44 and receives signals from

  The output of the first comparator represents the level of "decibels above the base echo" which is applied to the second comparator 80 corresponding to the comparator 46, the comparator 80 receiving also the threshold signal from the device 45 The level signal in "decibels above the base echo" is also applied to the tri-state buffer 50, which is only enabled by the output signal of an AND gate 82, which receives at its inputs the output signal of the shift register transmitted to the gate circuit

  preceding, and the output signal of the second comparator 80.

  As a result, the AND gate only allows the buffer to

  three states to receive the level signal in "decibels above

  above the base echo "if there is a signal at the output of the second comparator 80, the latter output signal occurring only if the signal of" decibels above the base echo "exceeds the level In all other aspects, the signal analyzer is constructed and operates as indicated with reference to Figs. 1 to 7, and

as previously described.

  Although the signal analyzer has been described in

  particular in reference to a turbine disk of a gas turbine engine, it can be applied to other parts in

  which there is a variation of section.

Claims (17)

  Signal analyzer, characterized in that it comprises a plurality of signal processing channels (10), each channel (10) being arranged to receive the signals to be analyzed by means of a triggering means (38), all   triggering means that can be actuated by a   triggering circuit for allowing the signal to be analyzed by each channel to pass successively in the signal processing channels, each channel having a holding circuit (40; 74) arranged to receive and maintain the peak value of the signal in the slot; respective time, a   averaging filter (42; 76) arranged to receive   see the output signal of the hold circuit (40; 74), a first comparator (44; 78) arranged to receive the   output signals of the holding circuit and the filter of   average output, the output signal of the first   a second comparator (46; 80) which also receives a threshold level signal, the output signal of the second comparator being used to determine whether or not the signal from the first comparator is significant and, if so, to save the   output signal of the first comparator.   Signal analyzer according to claim 1, agent   to analyze the signals generated by an ultrasonic detector   Sonic of cracks during control of a room, characterized in that, in each of the signal processing channels (10), the output signal of the averaging filter (42; 76) represents the average level of "base echo" in the respective processing channel, in that the output signal of the first comparator (44; 78) represents the difference between the last signal level stored by the holding circuit (40; 74) and the level means of "base echo", and that the output signal of the second comparator (46; 80) indicates whether the output signal of the first:   comparator has exceeded or exceeded the threshold level.   An analyzer according to claim 1, characterized in that the gate release control comprises at least one clock circuit (14, 58) excited by a pulse -W 18 -.   for tripping, the clock circuit transmitting control pulses which are applied to a shift register (12)   which opens the door of each successive processing channel   the time during which each door is kept open being determined by the width of the pulses of   control that are generated by the clock circuit.   4. Analyzer according to claim 2, characterized in that it comprises at least two clock circuits (14, 58), in that the control pulse width generated by one of the clock circuits is uniform for all the channel triggering means and can be pre-set between limits depending on the number of available channels, the thickness of the part being examined and the   minimum width of the signal to be examined.   An analyzer according to claim 4, characterized in that the control pulse width generated by the other of said clocks (14, 58) is controlled by the echo magnitude and varies according to the magnitude of the echo signal from the room so that, in the region of a geometric echo, the pulse width of   control is reduced by allowing each channel to   to examine a shorter duration of the echo signal in the region of a large variation in thickness in the part, the uniform clock (14) still being used to measure the depth of the crack via 'a counting circuit (20).   6. Analyzer according to claim 4, characterized in that it comprises a switch means allowing the two clock circuits (14, 58) to receive trigger pulses from the signals transmitted by the crack detector by the intermediate of a delay element (60), or from the echo signals from the crack detector and that the input signal applied to the shift register (12) is selected from the   output signals of the two clock circuits (14, 58).   7. Analyzer according to claim 1, characterized in that the signal transmitted by the gate control to a signal processing channel is arranged to clear the 25212   signal contained in the maintenance circuit of the immediate channel. next.   An analyzer according to claim 1, characterized in that the digital data generated by each channel is transmitted via a three-state buffer (50) to a visual display device (64) and / or a   printer (24) and / or a computer (34) through   of one or more data buses.   9. Analyzer according to claim 8, characterized in that the signal from the gate means (38) is arranged   to validate the tri-state buffer (50) of the processing channel immediately following.   10. Analyzer according to claim 1, characterized in that the holding circuit comprises a capacitive circuit, in that the first comparator comprises a differential amplifier (44) and in that the second comparator comprises an analog comparator (46).   11. An analyzer according to claim 10, characterized in that the capacitive circuit comprises a capacitor and a capacitor. buffer.   Analyzer according to claim 1, characterized in that each signal processing channel (10) comprises   an analog-to-digital converter (48) arranged to receive   see the output signal of the first comparator (44) when the converter is enabled by the output signal of the second comparator (46), the signal from the gate means (38) and applied to a processing channel being arranged to clear   the analogue-to-digital converter of the same channel of   ment. An analyzer according to claim 1, characterized in that the analog signals are processed by a variable amplifier attenuator and a logarithmic amplifier before being examined by each of the signal processing channels. (10).   Analyzer according to claim 1, characterized in that the holding circuit comprises a digital register (74) and in that the first and second comparators are   each 4 digital comparators (78, 80).   An analyzer according to claim 14, characterized in that the output signal of the second comparator (80) is applied to a logic switching device whose output signal allows a tri-state buffer (50) to receive the output signal of the first comparator (78)   when this output signal exceeds the threshold level.   16. Analyzer according to claim 15, characterized in that the logic switching device comprises an AND gate receiving an input signal from the command.   the establishment of closed slots (38) of the previous signal.   17. Analyzer according to claim 14, characterized in   what the signals to be analyzed are treated by an attenuator-   variable amplifier and through an analog converter-   before being examined by each of the processing channels. signals.