FR2518781B1 - Ensemble de traitement reparti de donnees et controleur de transmissions - Google Patents

Ensemble de traitement reparti de donnees et controleur de transmissions

Info

Publication number
FR2518781B1
FR2518781B1 FR8221481A FR8221481A FR2518781B1 FR 2518781 B1 FR2518781 B1 FR 2518781B1 FR 8221481 A FR8221481 A FR 8221481A FR 8221481 A FR8221481 A FR 8221481A FR 2518781 B1 FR2518781 B1 FR 2518781B1
Authority
FR
France
Prior art keywords
data processing
distributed data
transmission controller
processing assembly
assembly
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
FR8221481A
Other languages
English (en)
French (fr)
Other versions
FR2518781A1 (fr
Inventor
Simon S Chen
Artur Ichnowski
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Intersil Corp
Original Assignee
Intersil Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intersil Inc filed Critical Intersil Inc
Publication of FR2518781A1 publication Critical patent/FR2518781A1/fr
Application granted granted Critical
Publication of FR2518781B1 publication Critical patent/FR2518781B1/fr
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/163—Interprocessor communication
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
    • G06F12/0615—Address space extension
    • G06F12/0623—Address space extension for memory modules

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Software Systems (AREA)
  • Multi Processors (AREA)
  • Information Transfer Systems (AREA)
  • Small-Scale Networks (AREA)
FR8221481A 1981-12-22 1982-12-21 Ensemble de traitement reparti de donnees et controleur de transmissions Expired FR2518781B1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US33348681A 1981-12-22 1981-12-22

Publications (2)

Publication Number Publication Date
FR2518781A1 FR2518781A1 (fr) 1983-06-24
FR2518781B1 true FR2518781B1 (fr) 1988-04-29

Family

ID=23302991

Family Applications (1)

Application Number Title Priority Date Filing Date
FR8221481A Expired FR2518781B1 (fr) 1981-12-22 1982-12-21 Ensemble de traitement reparti de donnees et controleur de transmissions

Country Status (4)

Country Link
JP (1) JPS58109960A (ko)
DE (1) DE3247083A1 (ko)
FR (1) FR2518781B1 (ko)
GB (1) GB2112186B (ko)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58123148A (ja) * 1982-01-18 1983-07-22 Hitachi Ltd デ−タ伝送システム
GB8328396D0 (en) * 1983-10-24 1983-11-23 British Telecomm Multiprocessor system
US4688172A (en) * 1984-11-13 1987-08-18 International Business Machines Corporation Initialization apparatus for a data processing system with a plurality of input/output and storage controller connected to a common bus
GB2175421B (en) * 1985-05-13 1989-11-29 Singer Link Miles Ltd Computing system
US5228127A (en) * 1985-06-24 1993-07-13 Fujitsu Limited Clustered multiprocessor system with global controller connected to each cluster memory control unit for directing order from processor to different cluster processors
JPH07104837B2 (ja) * 1987-11-25 1995-11-13 富士通株式会社 プロセッサの制御方法
CA2026768C (en) * 1989-11-13 1996-07-23 Russell S. Padgett Extended addressing using sub-addressed segment registers
JPH0378421U (ko) * 1989-11-29 1991-08-08
DE4202852A1 (de) * 1992-02-01 1993-08-05 Teldix Gmbh Anordnung zum uebermitteln derselben nachricht an ausgewaehlte prozessoren eines mehrprozessorsystems

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3909790A (en) * 1972-08-25 1975-09-30 Omnus Computer Corp Minicomputer with selector channel input-output system and interrupt system
DE2546202A1 (de) * 1975-10-15 1977-04-28 Siemens Ag Rechnersystem aus mehreren miteinander verbundenen und zusammenwirkenden einzelrechnern und verfahren zum betrieb des rechnersystems
DE2641741C2 (de) * 1976-09-16 1986-01-16 Siemens AG, 1000 Berlin und 8000 München Rechenanlage aus mehreren miteinander über ein Sammelleitungssystem verbundenen und zusammenwirkenden Einzelrechnern und einem Steuerrechner
US4158227A (en) * 1977-10-12 1979-06-12 Bunker Ramo Corporation Paged memory mapping with elimination of recurrent decoding
US4285039A (en) * 1978-03-28 1981-08-18 Motorola, Inc. Memory array selection mechanism
JPS5561866A (en) * 1978-11-02 1980-05-09 Casio Comput Co Ltd Memory designation system
AT361726B (de) * 1979-02-19 1981-03-25 Philips Nv Datenverarbeitungsanlage mit mindestens zwei mikrocomputern

Also Published As

Publication number Publication date
GB2112186B (en) 1985-09-11
JPS6246025B2 (ko) 1987-09-30
GB2112186A (en) 1983-07-13
FR2518781A1 (fr) 1983-06-24
DE3247083A1 (de) 1983-07-07
JPS58109960A (ja) 1983-06-30

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Legal Events

Date Code Title Description
ST Notification of lapse