FR2498037A1 - TIME DISTRIBUTED TELEPHONE SWITCHING SYSTEM - Google Patents

Abstract

THE INVENTION RELATES TO A TIME-DISTRIBUTED TELEPHONE SWITCHING SYSTEM IN WHICH MULTIPLEX TIME-DISTRIBUTED SIGNALS ARE EXCHANGED. ACCORDING TO THE INVENTION, THE SYSTEM INCLUDES A TIME SWITCH WHICH CONTAINS A M VOICE CHANNEL MEMORY DEVICE FOR TEMPORARILY STORING CONVERSATION INFORMATION AT THE TIME OF SWITCHING, THE MEMORY FORMING DEVICE BEING SUBDIVIDED INTO M BLOCKS, OR M IS A NUMBER INTEGER GREATER THAN 2, AND TO THE BLOCKS ARE ASSIGNED COLUMN AND ROW NUMBERS OF A MATRIX HAVING M COLUMNS AND M RANGES WITH A MEANS ALLOWING ACCESS OF AN ARRIVAL COMMUNICATION LINE 91-91 TO A PREDETERMINED ADDRESS OF A BLOCK BELONGING TO A COLUMN OF THE MATRIX CORRESPONDING TO THE INPUT LINE, AND A MEANS TO ALLOW THE ACCESS OF AN OUTPUT LINE 102-102 TO A PREDETERMINED ADDRESS OF A MEMORY BLOCK BELONGING TO A COLUMN FROM THE MATRIX CORRESPONDING TO THE OUTPUT COMMUNICATION LINE IN ORDER TO PROCESS A NUMBER OF TIME-SLICES IN A GROUP. THE INVENTION APPLIES IN PARTICULAR TO TELEPHONE COMMUNICATIONS.

Description

This application is a division of the application

  No. 7902505, incorporated herein by reference.

  According to the present invention there is provided a time division telephone switching system where time division multiplexed signals are exchanged, these systems including a time switch which includes a voice channel memory device for temporarily storing the voice. speech or voice information at the time of switching, this memory device being subdivided into m2 memory blocks, om is an integer greater than 2; the subdivided memory blocks being assigned column and row numbers of a matrix having m columns and m rows, means for allowing access of an incoming communication line to a predetermined address of a memory block belonging to a column of the matrix corresponding to the incoming communication line, and means for allowing access of an output communication line to a predetermined address of a memory block belonging to a column of the matrix corresponding to the output communication matrix, in order to process a number of time slots

as a group.

  In another aspect, the invention provides a time division telephone switching system where time division multiplexed signals are exchanged, the system including a time switch having a voice channel memory device adapted for temporary storage. the voice or speech information at the time of the switching operation, the memory device being subdivided into m2 memory blocks (om is an integer greater than 2) adapted to control the reading and writing of addresses, to these memory blocks being assigned column and row numbers of a matrix having m columns and m rows, means for allowing access of an incoming communication line to a predetermined address of a block of memory belonging to a column of the matrix corresponding to the arrival communication line,

  means to allow access to a communication line

  output to a predetermined address of a block of

  memory belonging to a column of the corresponding matrix.

  on the output communication line, thereby processing a number of time slots as a group, a holding memory device for jointly controlling a memory block of the voice channel memory device to controlling a write address and a memory block for controlling a read address, means for applying a write address to a memory block belonging to a row of the array corresponding to the number of memory device controlling the address and means for applying a read address to a memory block belonging to a column of the array corresponding to the number of the memory device controlling the address, thereby forcing an access time of the voice channel memory device which is allocated to the read or retrieve operation, to precede an access time allocated to the write operation, the access times occurring

  at least twice per time.

  The invention will be better understood, and other purposes, features, details and advantages thereof

  will become clearer during the description

  explanatory text which will follow with reference to the accompanying schematic drawings given solely by way of example illustrating several embodiments of the invention and in which:

  - Figure 1 shows another schematic modification

  that the time division telephone switching network of Figure 19 of the parent application

7902505;

  FIG. 2 gives a block diagram of a time division telephone switching system according to the invention; FIG. 3 is a connection diagram useful for explaining the operation of the system of FIG. 2; and FIG. 4 is a block diagram showing a modification

  the system of Figure 2.

  In Fig. 1, a time division telephone switching system has an input line side 91 on an output line side 102. HM holding memory devices 15011, 15012, 15111, and 15112 provide statistical access to devices forming voice channel memories M, with respect to the input and output sides of each communication line. The memory devices M include voice channel memory devices M1, M12, M21, M22, etc., in common for primary and secondary switching over time. FIG. 2 gives a block diagram showing in more detail the system of FIG. 1. In FIG. 2, each of the m incoming communication lines 911-91m is multiplexed by n. In the same way, each of the 1021-102n output communication lines is also multiplexed by n. Each of the memories 160-160m (MII-Mmm) has a capacity of n / m words (this capacity can be increased or decreased depending on the amount of traffic and the probability of internal blocking). Each hold memory 150 1-150m serves as a control memory which designates the memory number and its address when time division multiplexed signals arrive via respective lines 911-91me Each memory 1511-151m serves as a control memory which denotes the number of a reading memory and its address

  when a signal is read from a memory for the purpose of

  the signal has respective lines 1021-102me Each hold memory has a storage capacity of n words, each having log2m + log2, where log2m bits refer to the number of the tandem memory log2 n / m bits is the address number of memory. In general, the hold memory 1501 controls the speech memories 160i-160m while the hold memory 1511 controls the speech memories 160 1160mm. This control method will now be described with reference to FIG. line having a time slot number 4 of the incoming communication line 921 must be connected to a line having a time slot number p of the line of

  output communication 102m. The memory of channels of con-

  The payload that can be used to establish this connection is a memory 1601m and its empty address can be chosen by a central processing unit (not shown). It is assumed that an empty address "a" of memory 160 has been designated. Then m is written in the log2m bits of the address d) of the holding memory 1501 and a is written in the log n bits, thus to the time slot b. of the output line 102m, the signal A stored at the address "a" of the memory 160lm can be

  read. In this way the time slotWi of the line of arrival

  911 and the slice K of the output line 102m are connected to each other. The connection in the opposite direction (the connection between the time slot e of the line 91m and the time slot e of the line 102i) is established in the same way using the memory 160m1 * At this moment, the active period of the conversation channel memory can be n times per frame to write and read respectively, so the total number of channels

that we can exchange is n x m.

  Figure 4 shows a pair control system

  incorporated in the system illustrated in Figures 2 and 3.

  In this case, the hold memories 1701 - 170m jointly control the incoming communication line and the output communication line using the write addresses and the read addresses of the information to the respective lines. In order to mutually connect the same lines, the conversation channel memory is read during the first half of a time slot and the data is written to that memory during the first half of a time slot.

  last half. As the exchange operation by

  in time is similar to the system shown

  in Figure 3, it is believed that its description is unnecessary.

  According to the embodiments described above, the voice channel memory device in a time switch is divided into a number of blocks which are arranged in a matrix in order to allow the incoming communication line to have access memory atiblocs belonging to the same row and the output communication line to have access to the memory blocks of the same column. As a result, it is possible to increase the capacity of the switch over time without redundantly using the memory, and without increasing its operating speed. Thus, according to the invention, it becomes possible to manufacture a distributed communications network. over time using a high capacity time switch which consists of inexpensive memory that can be fabricated as an integrated circuit. Thus, it is possible to easily increase the capacity of a time division switching network. If it is desired to further increase the capacity of the network, this capacity can be increased by combining in many stages, the switches

  in time or space switches.

Claims (6)

R E V E N D I C A T I 0 N S   Time division telephone commutation system where time division multiplexed signals are exchanged, characterized in that it comprises: a time switch which comprises a voice channel memory device (M) for temporarily storing voice information at the time of the   switching, said memory device being subdivided   referred to in m2 memory blocks, where m is an integer greater than 2; wherein the subdivided memory blocks are assigned the column and row numbers of a matrix having m columns and m rows, a means for providing access, to an incoming communication line (911-91% I at an address predetermined one of a memory block belonging to a column of said matrix corresponding to said incoming communication line, and means for providing access, to an output communication line (1021-102m at a predetermined address of a memory block belonging to a column of said matrix corresponding to the output communication line so as to process a number of time slots as a group. 2. System according to claim 1, characterized in that it further comprises: a number of voice channel units for controlled interconnection; and a central processing unit for performing a general control of said voice channel units; each of said voice channel units including a time division voice channel unit for exchanging signals between predetermined time slots, a digital main or trunk circuit for processing a signal associated with a channel containing a register signal and a Operational status signal of the   line, and control equipment for the conversation channel.   receiving and distributing control signals, which comprises an interface between said time division talk channel unit and said main digital circuit means; said pay-as-you-go talk channel unit   in time containing said time switch.   3. System according to claim 1, characterized in that the number of words of each memory varies from n / m according to conditions such as the efficiency of use of a communication line and the probability of internal blockages of said system. telephone switching, we represent the multiplicity of the line and m the number of   the column or row of said matrix.   Time division telephone commutation system where time division multiplexed signals are exchanged, characterized in that it comprises a time switch having a voice channel memory device capable of temporarily storing the speech information. or voice at the time of the switching operation, said memory device being subdivided into m2 memories (om is an integer greater than 2) adapted to control write and read addresses, with said memory blocks being assigned column and row, of a matrix having m columns and m rows, with   means to allow access to a communication line   arrival at a predetermined address of a memory block belonging to a column of said matrix corresponding to said incoming communication line and means for allowing access to an output communication line at a predetermined address d a memory block belonging to a column of said array corresponding to said output communication line for thereby processing a number of time slots into a group, a holding memory device (150) for controlling a memory in common dvidit voice channel memory device for controlling a write address and a memory block for controlling a read address, means for applying a write address to a memory belonging to a row of the array corresponding to the number of the memory device controlling the address and means for applying a read address to a memory belonging to a column of said matrix corresponding to the number of the memory device controlling the address, in order to force an access time of said device   voice channel memory which is allocated to an operation   read or retrieve, precede an access time allocated to a write operation, said access times occurring at least twice per time slot. 5. System according to claim 4, characterized in that it further comprises: a number of voice channel units for controlled interconnection; and a central processing unit for performing a general control of said voice channel units; each of said voice channel units including time division switches for exchanging signals between predetermined time slots, digital primary circuit means for processing a signal associated with a channel containing a register signal and a status signal line operator, and voice channel control equipment receiving and distributing control signals, which includes an interface between said time division voice channel unit, said digital master circuit means, and said central processing unit; said voice channel unit in distribution in   the time containing said time switch.   6. System according to claim 4, characterized in that the number of words of each memory block varies from n / m according to conditions such as the efficiency -5 of use of the communication line and the probability of internal blocking. of this line n represents the multiplicity of the communication line and m the number   columns or rows of an array of said memory blocks.