FR2493081A1 - Data bit inserter for TDM transmission system - has shift register storing binary elements on one route during sending of two consecutive time intervals - Google Patents

Data bit inserter for TDM transmission system - has shift register storing binary elements on one route during sending of two consecutive time intervals Download PDF

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Publication number
FR2493081A1
FR2493081A1 FR8022795A FR8022795A FR2493081A1 FR 2493081 A1 FR2493081 A1 FR 2493081A1 FR 8022795 A FR8022795 A FR 8022795A FR 8022795 A FR8022795 A FR 8022795A FR 2493081 A1 FR2493081 A1 FR 2493081A1
Authority
FR
France
Prior art keywords
transmission
input
signal
rank
shift register
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
FR8022795A
Other languages
English (en)
French (fr)
Other versions
FR2493081B1 (ref
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Thales SA
ALE International SAS
Original Assignee
Thomson CSF Telephone SA
Le Materiel Telephonique Thomson CSF
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Thomson CSF Telephone SA, Le Materiel Telephonique Thomson CSF filed Critical Thomson CSF Telephone SA
Priority to FR8022795A priority Critical patent/FR2493081A1/fr
Publication of FR2493081A1 publication Critical patent/FR2493081A1/fr
Application granted granted Critical
Publication of FR2493081B1 publication Critical patent/FR2493081B1/fr
Granted legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/08—Intermediate station arrangements, e.g. for branching, for tapping-off
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/06—Synchronising arrangements
    • H04J3/07—Synchronising arrangements using pulse stuffing for systems with different or fluctuating information rates or bit rates
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/05—Electric or magnetic storage of signals before transmitting or retransmitting for changing the transmission rate

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Power Engineering (AREA)
  • Time-Division Multiplex Systems (AREA)
FR8022795A 1980-10-24 1980-10-24 Data bit inserter for TDM transmission system - has shift register storing binary elements on one route during sending of two consecutive time intervals Granted FR2493081A1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
FR8022795A FR2493081A1 (en) 1980-10-24 1980-10-24 Data bit inserter for TDM transmission system - has shift register storing binary elements on one route during sending of two consecutive time intervals

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR8022795A FR2493081A1 (en) 1980-10-24 1980-10-24 Data bit inserter for TDM transmission system - has shift register storing binary elements on one route during sending of two consecutive time intervals

Publications (2)

Publication Number Publication Date
FR2493081A1 true FR2493081A1 (en) 1982-04-30
FR2493081B1 FR2493081B1 (ref) 1988-03-11

Family

ID=9247288

Family Applications (1)

Application Number Title Priority Date Filing Date
FR8022795A Granted FR2493081A1 (en) 1980-10-24 1980-10-24 Data bit inserter for TDM transmission system - has shift register storing binary elements on one route during sending of two consecutive time intervals

Country Status (1)

Country Link
FR (1) FR2493081A1 (ref)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3335222A (en) * 1963-12-20 1967-08-08 Bell Telephone Labor Inc Binary data rate reconstruction
FR2185900A1 (ref) * 1972-05-25 1974-01-04 Western Electric Co
USRE29215E (en) * 1972-05-25 1977-05-10 Bell Telephone Laboratories, Incorporated Cross-office connecting scheme for interconnecting multiplexers and central office terminals

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3335222A (en) * 1963-12-20 1967-08-08 Bell Telephone Labor Inc Binary data rate reconstruction
FR2185900A1 (ref) * 1972-05-25 1974-01-04 Western Electric Co
USRE29215E (en) * 1972-05-25 1977-05-10 Bell Telephone Laboratories, Incorporated Cross-office connecting scheme for interconnecting multiplexers and central office terminals

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
EXBK/75 *

Also Published As

Publication number Publication date
FR2493081B1 (ref) 1988-03-11

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Legal Events

Date Code Title Description
ER Errata listed in the french official journal (bopi)

Free format text: 17/82

ST Notification of lapse