FR2490036A1 - INVERTER CIRCUIT WITH LOAD STORAGE - Google Patents

Abstract

INVERTER CIRCUIT AVOIDING A SHORT-CIRCUIT OF THE DC POWER SUPPLY SOURCE. IT INCLUDES TWO TRANSISTORS Q1, Q2 MOUNTED SO AS TO ALTERNATIVELY CIRCULATE THE CURRENT OF A SUPPLY SOURCE 11, 12 IN A LOAD 21, THE TRANSISTORS STORING A LOAD APPLIED TO THEIR CONTROL ELECTRODES 27, 29, AND MEANS 26 , 28 TO TRANSFER A RETURN CURRENT, RESULTING FROM THE BLOCKING OF ONE TRANSISTOR, TO THE OTHER TRANSISTOR, SO THAT THIS OTHER TRANSISTOR IS MADE CONDUCTIVE AND STORES A LOAD WHICH KEEPS IT IN THIS STATE FOR A CERTAIN PERIOD OF TIME. APPLICATION TO DISCHARGE LAMPS.

Description

The invention relates to inverter circuits using transistors

  as switches to provide a power of

  alternative output from a continuous input energy.

  One of the most commonly used inverter circuits has two transistors, the transmitter of one of these transistors and the collector of the other being connected to form a junction point, the collector of the first and the emitter

  of the second transistor being respectively connected to the terminals

  from a DC power source.

  A load (lamp, motor, induction heating device)

  or other) is connected between the junction point and the power source. The transistors are alternately made conductive at a repetition frequency of the order of 1 kHz or more, under the control currents

  alternatively transferred to their base electrode, a

  alternative, thus crossing the charge from the

  this feeding. Control currents can be

  from rectangular waves or sinusoidal waves, the amplitude of which is sufficient to bring rapidly

  transistors in the conduction state, so that these transistors

  tors offer virtually no resistance to traffic

  supply and do not consume energy.

appreciable experience.

  It will be found in the United States Patent

  No. 4,051,426 the description of the inverter circuit which has just been

  described, this description denouncing a characteristic

  undesirable "charge storage" of transistors which

  can bring the two transistors of the circuit to the conductive state.

  simultaneously and cause an unacceptable short-circuit

  from the power source. The description gives a solution

  to this problem by connecting diodes in the circuit.

  The object of the invention is to provide a perfect inverter circuit

  an inverter circuit that constructively uses the

  charge storage characteristic of the transistors.

  The inverter circuit according to the invention comprises two transistors connected to transmit alternately, and

  repetitively, from electrical energy to an inductive load

  tive, or an inductive component charge. The emitter of one of the transistors and the collector of the other transistor are

  connected to form a junction point, the transmitter of the

  xth transistor and the collector of the first being respectively-

  connected to the terminals of an electrical power source

  than in direct current. An inductive load, or inductive component, is connected between the junction point and the power source. Short-term blocking pulses are alternately applied to the base electrodes of the transistors, and means such as diodes are connected so that when each transistor is blocked, a

  return current induced in the load is transferred to the

  to be transistor to create a stored charge that makes it

  driver and keeps him in that state until he

  the next blocking pulse. It is therefore not born

  provide the circuit with repetitive external conduction control pulses; a single pulse of

  conduction control is necessary to initiate the function

  circuit. Preferably, the repetition frequency

  blocking pulses supplied to each transistor is sufficiently high that the stored charges

  in each transistor are not removed before transmitting

  firing of the next blocking pulse; in other words, the

  frequency of repetition of the blocking pulses is sufficient

  high so that the end of the conduction periods of the transistors is determined by the blocking pulses and

  not by the elimination of the stored charges. In a

  laughter, blocking impulses are not used, and frequency

  the operation of the switch is determined by the

  elimination time of stored charges.

  The following description refers to the accompanying drawings

  which represent: - Fig. 1, the diagram of a recommended version of circuit according to the invention; and - Fig. 2, the diagram of some signals, voltages and

  current in the circuit of Figure 1 in operation.

  Two transistors Q1 and Q2 are connected between terminals 11 and 12 of a DC power source which may be constituted by a full-wave rectifier bridge providing about 200 V DC, from a

  120 V AC input voltage. In the drawing, the

  ne 11 is positive and terminal 12 is negative. The emitter 13 of the transistor Q1 and the collector 14 of the transistor Q2 are connected to each other to form a junction point 16.

  The collector 17 of the transistor Q1 is connected to the po-

  11, and the emitter 18 of the transistor Q2 is connected to the negative supply terminal 12. An inductive or inductive component load 21, such as a gas discharge lamp, a motor, a device inductive heating, etc ... is connected between the junction point 16

  and the power source, this last connection is

  two capacitors 22 and 23 connected in series between

  the supply terminals 11 and 12, the load 21 being connected to

  at the junction point 24 of the two capacitors. Condensations

  22 and 23 preferably have the same capacity value.

  high enough for their impedance to be low at the operating frequency of the circuit (ie 1 kHz or more,

  for example). It can therefore be considered that the load 21 is connected with

  strung between the junction point 16 of the transistors and a middle tap of the power source. The charge 21 can

  be constituted by a coupling transformer.

  A diode 26 is connected between the base 27 and the emitter 13 of the transistor Qi, so as to pass a current of

  positive polarity to this base. Another diode 28 is connected

  corded between the base 29 and the emitter 18 of the transistor Q2, so as to pass a negative polarity current in

  from the base 29. A source 31 of blocking pulses

  ge is connected to the base electrodes 27 and 29 and provides, to these electrodes, alternately and repetitively, negative polarity blocking pulses, at a frequency of

  in the order of 1 kHz or more, preferably of the order of 20 kHz.

  A source 32 of conduction control is connected to one

  base electrodes, ie the electrode 29, and provides for this

  the electrode a positive polarity pulse. The source of blocking pulses 31 may be a multivibrator circuit

  bistable, or constituted by two sources of corrective impulses

  synchronized, and the conduction control source

249003.6

  can be constituted by a monostable multivibrator.

  In FIG. 2, the signals, voltages and currents of the circuit of FIG. 1 are represented as a function of the same times. A positive single conduction control pulse 36 is provided by the source 32 and transferred to the base 29

  of the transistor Q2 to initiate the operation of the circuit.

  The negative repetitive blocking pulses 37 and 38 are provided by the source 31 and transferred respectively to the base electrodes 27 and 29 of the transistors Q1 and Q2. The two sets of blocking pulses are out of phase by 1800

  one with respect to the other. The two curves 39 and 40 represent

  respectively feel the voltage across the load 21 and the current in this load, the voltage 39 being a wave

  rectangular because the transistors Qi and Q2 are alternating

  natively switched, and the shape of the current 40 being characterized

  tick of an inductive component charge. Curves 41 and 42 respectively represent the return current of the inductive load and the resulting stored load, based on the

  transistor Ql. Likewise, the curves 43 and 44 represent

  the return current of the inductive load and the

  resulting stored charge, based on transistor Q2.

  The circuit works as follows. The command pulse

  conduction transistor 36 makes the transistor Q2 conductive, thereby

  draws the circulation of a current 40 in the load 21, by

  through the capacitor 22. After the disappearance of the

  - drive pulse 36, and as soon as the first pulse appears

  blocking voltage 38 on the base 29 of the transistor Q2, this transistor

  tor is blocked and the current ceases to flow in the load 21; but the energy stored in the inductive component of

  the load creates a return voltage that results in a

  rant 41 of positive polarity which flows to the base 27 of the

  transistor Q1 via the diode 26. The transistor

  tor Ql is thus made conductive. At this moment, Ql works

  like an inverted transistor, the base-collector junction

  the transmitter and the base-transmitter junction becoming the

  reader. A charge 42 is stored in Qi during this

  period. When the inductive energy has dissipated, the

  stored state keeps the transistor Q1 in the conductive state.

  tion, the current 40 'flowing in the load 21 through the

  capacitor 23, in the opposite direction to that of

  current flow when transistor Q2 is conducting

  tor. The stored charge is partially eliminated as shown in curve 42; but the frequency of the blocking pulses is chosen sufficiently high (eg 20 kHz) for the next blocking pulse 37 to be transferred to the base 27 while the stored charge still holds the transistor in the conduction state. . This blocking pulse eliminates the stored charge and blocks the transistor Q1, the current ceasing to flow in the load; but the energy stored in the inductive component of the charge creates a

  return voltage which results in a current 43 (polarity)

  negative at the junction point 16) which is transferred by the collector-base junction of the transistor Q2 and the diode 28, and which is the equivalent of a positive polarity pulse 43 transferred to the base 29; this pulse, shown in the figure, makes the transistor Q2 conductive again, this

  transistor operating in reverse mode, with stored charge

  born 44 which keeps him in the state of conduction until the

  rition of the blocking pulse 38 which follows. The process repeats itself as described and causes the flow of a current

alternative 40 in the load 21.

  Inductive feedback pulses are therefore used.

  placed in the circuit, to control the passage of

  in the conduction state, and the emma-

  gasined to keep the transistors in this state during their conduction cycles; it is therefore not necessary to

  have an external source of control pulses rec-

  tangles or sinusoidal, which reduces the energy requirements

  of the circuit and increases its efficiency. Pulse impulses

  cage 37 and 38 can be of very short duration, for example

  of five microseconds, and low energy, so that the

  total energy required is very low compared to

  control currents of the prior devices. We can still

  Reduces the energy required by reducing the frequency of

  petition blocking impulses, a relatively larger portion of stored charges 42 and 44 then being

  eliminated via the internal impedance of the

  sistors. In the circuit according to the invention, it also avoids the short circuit of the power source, as described in the aforementioned patent, which occurs when the load stored in a transistor keeps it conductive while the other transistor has gone into the conduction state, the two simultaneously conducting transistors causing the short circuit of the power source. In the circuit according to the invention, each transistor goes to the conduction state under the dependence of the return current which is formed only when the other transistor has been blocked, and it is therefore impossible that the two transistors are simultaneously

  conductors. Finally, the charges stored in the trans-

  tors were undesirable until then; they are used

  vantageusement in the inverter circuit according to the invention.

  In a variant according to the invention, blocking pulses 37 and 38 are not used, each of the transistors, when conducting, remaining in this state until the stored charge is sufficiently eliminated for

  it hangs automatically. The frequency of operation

  of the circuit is therefore determined by the characteristic of

  discharge time of the stored charge of the transistors.

  If you want to fine tune the frequency of operation

  tionally, it is better to use the pulses of

blocking 37, 38.

  It is understood that the above description has been made

  as a non-limitative example and that variants may be

  be considered without departing from the scope of the invention.

  and the appended claims. For example,

  a half-bridge inverter circuit, but the invention is

  cable to bridge circuits and symmetrical circuits.

Claims (10)

R E V E N D I C A T IO N S   1 - Inverter circuit, operating under dependence   of a DC power source (11, 12),   voiding the circulation of an alternating current in a   inductive or inductive-component ge (21) having at least two transistors (Q1, Q2) mounted to alternately flow the power source current through the load, the transistors having the property of storing an applied load on their control electrodes (27, 29), the charge having the property of forming a return current when the current ceases to flow through it, circuit characterized in that it comprises means (26, 28) for transferring the current of return, resulting from the blocking of a transistor, to the other transistor, so that this other transistor is made conductive and stores a charge that keeps it in this   state for a certain period of time.   2 - Inverter circuit, operating in dependence   of a continuous power source (11, 12),   voiding the circulation of an alternating current in a   inductive or inductive component (21) having two transistors (Q1, Q2), means connecting the transmitter (13)   from the first transistor (Q1) to the collector (14) of the second transistor   sistor (Q2) to form a junction point (16), means connecting the collector (17) of the first transistor to the terminal   (11) of the power source, connecting means   emitter (18) of the second transistor to the negative terminal (12) of the power source, and means connecting the   charge (21) between the junction point (16) and the source of   power supply, the transistors having the property of storing a charge applied to their base electrodes (27, 29), the   charge having the property of forming a return current when   that the current stops passing through it, circuit characterized in that it comprises means (26, 28) mounted between the load and the base electrodes for transferring the return current, resulting from the blocking of a transistor, to the other transistor,   for this other transistor to be made conductive and   sine a charge that keeps him in that state for a a certain period of time.   3 - Circuit according to claim 1 or 2, characterized   in that it comprises means (32) which provide an im-   conduction control pulse (36) to one of the transistors (Q2), to make it conductive and to initiate the operation of the circuit. 4 - Circuit according to claim 3, characterized in that the conduction control pulse is a positive polarity pulse transferred to the base (29) of the second transistor (Q2).   5 - Circuit according to claim 1, characterized in that   that the means of transfer of the return current to the transistors   tors are constituted by diodes (26, 28).   6 - Circuit according to claim 2, characterized in that   that the means of transfer of the return current to electro-   base units consist of two diodes (26, 28) each   mounted between these basic electrodes and the junction (16).   7 - Circuit according to claim 1 or 2, characterized in   it comprises means (31) which provide impulse   repetitive and alternating blockages (37, 38), these impulses   are respectively transferred to the control electrodes (27, 29) of the transistors to block them   alternatively after a determined conduction time.   8 - Circuit according to claim 7, characterized in that   the frequency of the blocking impulses provided to the sistors is greater than -1 kHz.   9 - Circuit according to claim 7, characterized in that   the frequency of the blocking impulses provided to the sistors is of the order of 20 kHz.   10 - Circuit according to claim 7, characterized in that the load (21) is connected to the power source through two capacitors (22, 23) connected in series to the terminals (11, 12) of this source , one end of the   charge being connected to the junction point (24) of the capacitors tors.