FR2482802B1 - - Google Patents

Info

Publication number
FR2482802B1
FR2482802B1 FR8109408A FR8109408A FR2482802B1 FR 2482802 B1 FR2482802 B1 FR 2482802B1 FR 8109408 A FR8109408 A FR 8109408A FR 8109408 A FR8109408 A FR 8109408A FR 2482802 B1 FR2482802 B1 FR 2482802B1
Authority
FR
France
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
FR8109408A
Other languages
French (fr)
Other versions
FR2482802A1 (fr
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Magyar Optikai Muvek
Magyar Optikai Muevek
Original Assignee
Magyar Optikai Muvek
Magyar Optikai Muevek
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Magyar Optikai Muvek, Magyar Optikai Muevek filed Critical Magyar Optikai Muvek
Publication of FR2482802A1 publication Critical patent/FR2482802A1/fr
Application granted granted Critical
Publication of FR2482802B1 publication Critical patent/FR2482802B1/fr
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11BINFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10Digital recording or reproducing
    • G11B20/14Digital recording or reproducing using self-clocking codes
    • G11B20/1403Digital recording or reproducing using self-clocking codes characterised by the use of two levels
    • G11B20/1407Digital recording or reproducing using self-clocking codes characterised by the use of two levels code representation depending on a single bit, i.e. where a one is always represented by a first code symbol while a zero is always represented by a second code symbol
    • G11B20/1419Digital recording or reproducing using self-clocking codes characterised by the use of two levels code representation depending on a single bit, i.e. where a one is always represented by a first code symbol while a zero is always represented by a second code symbol to or from biphase level coding, i.e. to or from codes where a one is coded as a transition from a high to a low level during the middle of a bit cell and a zero is encoded as a transition from a low to a high level during the middle of a bit cell or vice versa, e.g. split phase code, Manchester code conversion to or from biphase space or mark coding, i.e. to or from codes where there is a transition at the beginning of every bit cell and a one has no second transition and a zero has a second transition one half of a bit period later or vice versa, e.g. double frequency code, FM code

Landscapes

  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Signal Processing For Digital Recording And Reproducing (AREA)
FR8109408A 1980-05-14 1981-05-12 Dispositif electronique de decodage d'informations pour un dispositif fonctionnant en auto-synchronisation Granted FR2482802A1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
HU118980A HU183139B (en) 1980-05-14 1980-05-14 Electronic decoding circuit arrangement for systems with self-synchronization

Publications (2)

Publication Number Publication Date
FR2482802A1 FR2482802A1 (fr) 1981-11-20
FR2482802B1 true FR2482802B1 (Direct) 1984-06-08

Family

ID=10953254

Family Applications (1)

Application Number Title Priority Date Filing Date
FR8109408A Granted FR2482802A1 (fr) 1980-05-14 1981-05-12 Dispositif electronique de decodage d'informations pour un dispositif fonctionnant en auto-synchronisation

Country Status (2)

Country Link
FR (1) FR2482802A1 (Direct)
HU (1) HU183139B (Direct)

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3510786A (en) * 1967-07-17 1970-05-05 Ibm Synchronizing circuit compensating for data bit shift
US3631422A (en) * 1969-02-03 1971-12-28 Ibm System for detection of data time interval measurement
DE2460534B2 (de) * 1974-12-20 1977-12-01 Siemens AG, 1000 Berlin und 8000 München Schaltungsanordnung zur decodierung von von magnetschichtspeichern gelieferten lesesignalen
DD124408A3 (Direct) * 1975-04-09 1977-02-23
DE2804593C2 (de) * 1978-02-03 1979-09-27 Institut Fuer Rundfunktechnik Gmbh, 8000 Muenchen Verfahren und Anordnung zum Demodulieren eines binär codierten, phasenmodulierten Signals
DE2905668A1 (de) * 1978-06-15 1979-12-20 Rca Corp Anordnung fuer das magnetische aufzeichnen eines binaercodierten signals

Also Published As

Publication number Publication date
FR2482802A1 (fr) 1981-11-20
HU183139B (en) 1984-04-28

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Legal Events

Date Code Title Description
ST Notification of lapse