FR2452790A1 - INTEGRATED SEMICONDUCTOR CIRCUIT COMPRISING INTEGRATED MEMORY CAPACITORS - Google Patents

INTEGRATED SEMICONDUCTOR CIRCUIT COMPRISING INTEGRATED MEMORY CAPACITORS

Info

Publication number
FR2452790A1
FR2452790A1 FR8006953A FR8006953A FR2452790A1 FR 2452790 A1 FR2452790 A1 FR 2452790A1 FR 8006953 A FR8006953 A FR 8006953A FR 8006953 A FR8006953 A FR 8006953A FR 2452790 A1 FR2452790 A1 FR 2452790A1
Authority
FR
France
Prior art keywords
layer
integrated
memory capacitors
semiconductor circuit
electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
FR8006953A
Other languages
French (fr)
Other versions
FR2452790B3 (en
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
TDK Micronas GmbH
ITT Inc
Original Assignee
Deutsche ITT Industries GmbH
ITT Industries Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Deutsche ITT Industries GmbH, ITT Industries Inc filed Critical Deutsche ITT Industries GmbH
Publication of FR2452790A1 publication Critical patent/FR2452790A1/en
Application granted granted Critical
Publication of FR2452790B3 publication Critical patent/FR2452790B3/fr
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/403Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh
    • G11C11/404Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh with one charge-transfer gate, e.g. MOS transistor, per cell
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C19/00Digital stores in which the information is moved stepwise, e.g. shift registers
    • G11C19/18Digital stores in which the information is moved stepwise, e.g. shift registers using capacitors as main elements of the stages
    • G11C19/182Digital stores in which the information is moved stepwise, e.g. shift registers using capacitors as main elements of the stages in combination with semiconductor elements, e.g. bipolar transistors, diodes
    • G11C19/184Digital stores in which the information is moved stepwise, e.g. shift registers using capacitors as main elements of the stages in combination with semiconductor elements, e.g. bipolar transistors, diodes with field-effect transistors, e.g. MOS-FET
    • G11C19/186Digital stores in which the information is moved stepwise, e.g. shift registers using capacitors as main elements of the stages in combination with semiconductor elements, e.g. bipolar transistors, diodes with field-effect transistors, e.g. MOS-FET using only one transistor per capacitor, e.g. bucket brigade shift register
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/552Protection against radiation, e.g. light or electromagnetic waves
    • H01L23/556Protection against radiation, e.g. light or electromagnetic waves against alpha rays
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/06Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
    • H01L27/0688Integrated circuits having a three-dimensional layout
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/08Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
    • H01L27/0805Capacitors only
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B12/00Dynamic random access memory [DRAM] devices
    • H10B12/30DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Health & Medical Sciences (AREA)
  • Electromagnetism (AREA)
  • Toxicology (AREA)
  • Semiconductor Memories (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Semiconductor Integrated Circuits (AREA)

Abstract

CIRCUIT INTEGRE A SEMI-CONDUCTEURS COMPRENANT DES CONDENSATEURS DE MEMOIRE CHARGES OU DECHARGES PAR L'INTERMEDIAIRE DE COMMUTATEURS ELECTRONIQUES. L'INVENTION PERMET DE MINIMISER LA SENSIBILITE DE CE TYPE DE CIRCUIT AUX PARTICULES A EN REALISANT LES CONDENSATEURS C1, 2 DE FACON A EVITER LA FORMATION D'UNE COUCHE D'APPAUVRISSEMENT DANS LE SUBSTRAT 4. DE TELS CONDENSATEURS SONT CONSTITUES PAR UNE PREMIERE COUCHE D'ELECTRODE 3 DEPOSEE SUR UNE COUCHE ISOLANTE 13 ET CONNECTEE AU POTENTIEL DU SUBSTRAT, UNE COUCHE DE DIELECTRIQUE 1 ET UNE SECONDE COUCHE D'ELECTRODE 2, 2. APPLICATION AUX MEMOIRES DYNAMIQUES A ACCES SELECTIF, A CAPACITES COMMUTEES PAR DES TRANSISTORS MOS.SEMICONDUCTOR INTEGRATED CIRCUIT INCLUDING MEMORY CAPACITORS CHARGED OR DISCHARGED THROUGH ELECTRONIC SWITCHES. THE INVENTION ALLOWS THE SENSITIVITY OF THIS TYPE OF CIRCUIT TO PARTICLES A TO BE MINIMIZED BY ACHIEVING THE CAPACITORS C1, 2 SO AS TO AVOID THE FORMATION OF A DEPLETION LAYER IN THE SUBSTRATE 4. SUCH CONDENSERS ARE CONSTITUTED BY A FIRST LAYER. OF ELECTRODE 3 DEPOSITED ON AN INSULATING LAYER 13 AND CONNECTED TO THE POTENTIAL OF THE SUBSTRATE, A LAYER OF DIELECTRIC 1 AND A SECOND LAYER OF ELECTRODE 2, 2. APPLICATION TO DYNAMIC MEMORIES WITH SELECTIVE ACCESS, WITH CAPACITIES SWITCHED BY MOS TRANSISTORS.

FR8006953A 1979-03-29 1980-03-28 INTEGRATED SEMICONDUCTOR CIRCUIT COMPRISING INTEGRATED MEMORY CAPACITORS Granted FR2452790A1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19792912439 DE2912439A1 (en) 1979-03-29 1979-03-29 INTEGRATED SEMICONDUCTOR CIRCUIT WITH INTEGRATED STORAGE CAPACITY

Publications (2)

Publication Number Publication Date
FR2452790A1 true FR2452790A1 (en) 1980-10-24
FR2452790B3 FR2452790B3 (en) 1981-12-31

Family

ID=6066777

Family Applications (1)

Application Number Title Priority Date Filing Date
FR8006953A Granted FR2452790A1 (en) 1979-03-29 1980-03-28 INTEGRATED SEMICONDUCTOR CIRCUIT COMPRISING INTEGRATED MEMORY CAPACITORS

Country Status (4)

Country Link
JP (1) JPS55146958A (en)
DE (1) DE2912439A1 (en)
FR (1) FR2452790A1 (en)
GB (1) GB2045526A (en)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0033159B1 (en) * 1980-01-29 1984-05-02 Nec Corporation Semiconductor device
JPS5797682A (en) * 1980-12-10 1982-06-17 Clarion Co Ltd Variable capacitance device
DE3128014A1 (en) * 1981-07-15 1983-02-03 Siemens AG, 1000 Berlin und 8000 München ARRANGEMENT FOR REDUCING THE SENSITIVITY OF INTEGRATED SEMICONDUCTOR MEMORY AGAINST ALPHA RADIATION
FR2526225B1 (en) * 1982-04-30 1985-11-08 Radiotechnique Compelec METHOD FOR PRODUCING AN INTEGRATED CAPACITOR, AND DEVICE THUS OBTAINED
FR2530077A1 (en) * 1982-07-09 1984-01-13 Radiotechnique Compelec METHOD FOR PRODUCING INTEGRATED CAPACITORS IN A MICROELECTRONIC STRUCTURE
US5508881A (en) * 1994-02-01 1996-04-16 Quality Microcircuits Corporation Capacitors and interconnect lines for use with integrated circuits
EP0893831A1 (en) * 1997-07-23 1999-01-27 STMicroelectronics S.r.l. High voltage capacitor

Also Published As

Publication number Publication date
GB2045526A (en) 1980-10-29
JPS55146958A (en) 1980-11-15
DE2912439A1 (en) 1980-10-16
FR2452790B3 (en) 1981-12-31

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Legal Events

Date Code Title Description
ST Notification of lapse