FR2425673A1 - Dispositif de traitement de donnees par ordinateur - Google Patents

Dispositif de traitement de donnees par ordinateur

Info

Publication number
FR2425673A1
FR2425673A1 FR7911836A FR7911836A FR2425673A1 FR 2425673 A1 FR2425673 A1 FR 2425673A1 FR 7911836 A FR7911836 A FR 7911836A FR 7911836 A FR7911836 A FR 7911836A FR 2425673 A1 FR2425673 A1 FR 2425673A1
Authority
FR
France
Prior art keywords
memory
address information
computer
data processing
processing system
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
FR7911836A
Other languages
English (en)
Other versions
FR2425673B3 (fr
Inventor
Jan Gaston Bauwens
Jeroen Bonaventura Wi Ysseldyk
Christiane Marguerite Jo Voght
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
TDK Micronas GmbH
ITT Inc
Original Assignee
Deutsche ITT Industries GmbH
ITT Industries Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Deutsche ITT Industries GmbH, ITT Industries Inc filed Critical Deutsche ITT Industries GmbH
Publication of FR2425673A1 publication Critical patent/FR2425673A1/fr
Application granted granted Critical
Publication of FR2425673B3 publication Critical patent/FR2425673B3/fr
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/34—Addressing or accessing the instruction operand or the result ; Formation of operand address; Addressing modes
    • G06F9/342—Extension of operand address space
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
    • G06F12/0615—Address space extension

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Multi Processors (AREA)

Abstract

DISPOSITIF DE TRAITEMENT DE DONNEES PAR ORDINATEUR. LA PRESENTE INVENTION CONCERNE UN DISPOSITIF DE TRAITEMENT DE DONNEES COMPRENANT UN ORDINATEUR AVEC UNE UNITE DE TRAITEMENT ET UNE MEMOIRE, LA MEMOIRE ETANT DIVISEE EN UNE PLURALITE DE BLOCS DE POSITIONS DE MEMOIRE, AU MOINS L'UN DES BLOCS AYANT DES POSITIONS DE MEMOIRE MEMORISANT DES INSTRUCTIONS COMPRENANT UNE PREMIERE INFORMATION D'ADRESSE SE REFERANT A UNE SECONDE INFORMATION D'ADRESSE, ET L'UNITE DE TRAITEMENT ETANT APTE A ADRESSER L'UNE DES POSITIONS DE MEMOIRE DUDIT BLOC, POUR OBTENIR UNE SECONDE INFORMATION D'ADRESSE AVEC L'AIDE DE LA PREMIERE INFORMATION D'ADRESSE MEMORISEE DANS LA POSITION DE MEMOIRE ADRESSEE ET FINALEMENT ADRESSER UNE POSITION DE MEMOIRE DANS L'UN DES BLOCS AVEC L'AIDE DE LA SECONDE INFORMATION D'ADRESSE ET D'UN MOYEN INDIQUANT LE BLOC DE MEMOIRE QUI DOIT ETRE FINALEMENT ADRESSE. APPLICATION AUX SYSTEMES DE TRAITEMENT DE DONNEES.
FR7911836A 1978-05-12 1979-05-10 Dispositif de traitement de donnees par ordinateur Granted FR2425673A1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
BE866996 1978-05-12

Publications (2)

Publication Number Publication Date
FR2425673A1 true FR2425673A1 (fr) 1979-12-07
FR2425673B3 FR2425673B3 (fr) 1982-02-05

Family

ID=3861668

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7911836A Granted FR2425673A1 (fr) 1978-05-12 1979-05-10 Dispositif de traitement de donnees par ordinateur

Country Status (2)

Country Link
FR (1) FR2425673A1 (fr)
NZ (1) NZ190324A (fr)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4926316A (en) * 1982-09-29 1990-05-15 Apple Computer, Inc. Memory management unit with overlapping control for accessing main memory of a digital computer

Also Published As

Publication number Publication date
NZ190324A (en) 1982-12-07
FR2425673B3 (fr) 1982-02-05

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Legal Events

Date Code Title Description
ST Notification of lapse