FR2412982A1 - Circuit amplificateur pour lire et rafraichir de l'information - Google Patents

Circuit amplificateur pour lire et rafraichir de l'information

Info

Publication number
FR2412982A1
FR2412982A1 FR7738937A FR7738937A FR2412982A1 FR 2412982 A1 FR2412982 A1 FR 2412982A1 FR 7738937 A FR7738937 A FR 7738937A FR 7738937 A FR7738937 A FR 7738937A FR 2412982 A1 FR2412982 A1 FR 2412982A1
Authority
FR
France
Prior art keywords
circuit
logical
reading
elements defining
nodal points
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
FR7738937A
Other languages
English (en)
Other versions
FR2412982B1 (fr
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Signetics Corp
Original Assignee
Signetics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Signetics Corp filed Critical Signetics Corp
Priority to FR7738937A priority Critical patent/FR2412982A1/fr
Publication of FR2412982A1 publication Critical patent/FR2412982A1/fr
Application granted granted Critical
Publication of FR2412982B1 publication Critical patent/FR2412982B1/fr
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409—Read-write [R-W] circuits 
    • G11C11/4091—Sense or sense/refresh amplifiers, or associated sense circuitry, e.g. for coupled bit-line precharging, equalising or isolating
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/353—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
    • H03K3/356—Bistable circuits
    • H03K3/356017—Bistable circuits using additional transistors in the input circuit
    • H03K3/356052—Bistable circuits using additional transistors in the input circuit using pass gates
    • H03K3/35606—Bistable circuits using additional transistors in the input circuit using pass gates with synchronous operation
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/353—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
    • H03K3/356—Bistable circuits
    • H03K3/356086—Bistable circuits with additional means for controlling the main nodes
    • H03K3/356095—Bistable circuits with additional means for controlling the main nodes with synchronous operation

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Transforming Light Signals Into Electric Signals (AREA)

Abstract

CIRCUIT AMPLIFICATEUR POUR LA LECTURE ET LE RAFRAICHISSEMENT D'INFORMATION EMMAGASINEE, UTILISE EN COMBINAISON AVEC UNE SOURCE DE TENSION. CE CIRCUIT EST DU TYPE CAPABLE D'ACQUERIR DEUX ETATS DE CONDUCTION DIFFERENTS EN REPONSE A DES SIGNAUX APPLIQUES A DES PREMIER ET DEUXIEME NOEUDS, ET COMPORTE DES PREMIER ET DEUXIEME DISPOSITIFS ACTIFS COUPLES EN CROIX DONT CHACUN PEUT ETRE SOIT FORTEMENT CONDUCTEUR SOIT FAIBLEMENT CONDUCTEUR. DES MOYENS DE RETABLISSEMENT DE CHARGE SONT PREVUS ENTRE LESDITS DISPOSITIFS ACTIFS ET LA SOURCE DE TENSION EN VUE DE CONNECTER SELECTIVEMENT LA SOURCE UNIQUEMENT AU DISPOSITIF SE TROUVANT DANS SON ETAT FAIBLEMENT CONDUCTEUR. LORSQUE LE CIRCUIT EN QUESTION EST UTILISE DANS UNE MEMOIRE A ACCES ALEATOIRE, ON UTILISE EGALEMENT DES MOYENS POUR PRECHARGER DE FACON ALTERNANTE LES NOEUDS POUR LES AMENER DANS UN ETAT DETERMINE D'AVANCE ET POUR APPLIQUER L'INFORMATION EMMAGASINEE AUX NOEUDS EN VUE DE DONNER AU CIRCUIT AMPLIFICATEUR SES DEUX ETATS DE CONDUCTION EN REPONSE A L'INFORMATION EMMAGASINEE.
FR7738937A 1977-12-23 1977-12-23 Circuit amplificateur pour lire et rafraichir de l'information Granted FR2412982A1 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
FR7738937A FR2412982A1 (fr) 1977-12-23 1977-12-23 Circuit amplificateur pour lire et rafraichir de l'information

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR7738937A FR2412982A1 (fr) 1977-12-23 1977-12-23 Circuit amplificateur pour lire et rafraichir de l'information

Publications (2)

Publication Number Publication Date
FR2412982A1 true FR2412982A1 (fr) 1979-07-20
FR2412982B1 FR2412982B1 (fr) 1985-03-01

Family

ID=9199259

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7738937A Granted FR2412982A1 (fr) 1977-12-23 1977-12-23 Circuit amplificateur pour lire et rafraichir de l'information

Country Status (1)

Country Link
FR (1) FR2412982A1 (fr)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0040001A2 (fr) * 1980-04-15 1981-11-18 Fujitsu Limited Dispositif de mémoire dynamique à semi-conducteurs à chronologie réduite
EP0311956A2 (fr) * 1987-10-14 1989-04-19 Siemens Aktiengesellschaft Dispositif de couplage pour signaux large bande

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2317729A1 (fr) * 1975-07-10 1977-02-04 Burroughs Corp Amplificateur de detection ultrasensible pour memoires a cellules a un seul transistor
FR2321173A1 (fr) * 1975-08-11 1977-03-11 Nippon Telegraph & Telephone Circuit de detection de faibles signaux pour memoire a semi-conducteur
FR2392542A1 (fr) * 1976-08-05 1978-12-22 Minkov Jury Amplificateur de lecture pour memoires a circuits integres

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2317729A1 (fr) * 1975-07-10 1977-02-04 Burroughs Corp Amplificateur de detection ultrasensible pour memoires a cellules a un seul transistor
FR2321173A1 (fr) * 1975-08-11 1977-03-11 Nippon Telegraph & Telephone Circuit de detection de faibles signaux pour memoire a semi-conducteur
FR2392542A1 (fr) * 1976-08-05 1978-12-22 Minkov Jury Amplificateur de lecture pour memoires a circuits integres

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0040001A2 (fr) * 1980-04-15 1981-11-18 Fujitsu Limited Dispositif de mémoire dynamique à semi-conducteurs à chronologie réduite
EP0040001A3 (en) * 1980-04-15 1981-11-25 Fujitsu Limited A dynamic semiconductor memory device with decreased clocks
EP0311956A2 (fr) * 1987-10-14 1989-04-19 Siemens Aktiengesellschaft Dispositif de couplage pour signaux large bande
EP0311956A3 (en) * 1987-10-14 1990-05-23 Siemens Aktiengesellschaft Coupling device for broadband signals

Also Published As

Publication number Publication date
FR2412982B1 (fr) 1985-03-01

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Legal Events

Date Code Title Description
ST Notification of lapse