FR2409598B1 - Procede pour fabriquer des corps semi-conducteurs a bord profile de forme definie obtenu par attaque chimique et muni d'un revetement en verre - Google Patents
Procede pour fabriquer des corps semi-conducteurs a bord profile de forme definie obtenu par attaque chimique et muni d'un revetement en verreInfo
- Publication number
- FR2409598B1 FR2409598B1 FR787832104A FR7832104A FR2409598B1 FR 2409598 B1 FR2409598 B1 FR 2409598B1 FR 787832104 A FR787832104 A FR 787832104A FR 7832104 A FR7832104 A FR 7832104A FR 2409598 B1 FR2409598 B1 FR 2409598B1
- Authority
- FR
- France
- Prior art keywords
- shaped profile
- manufacturing semiconductor
- glass coating
- chemical attack
- semiconductor bodies
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 239000011248 coating agent Substances 0.000 title 1
- 238000000576 coating method Methods 0.000 title 1
- 238000004519 manufacturing process Methods 0.000 title 1
- 238000000034 method Methods 0.000 title 1
- 239000004065 semiconductor Substances 0.000 title 1
- 239000000126 substance Substances 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
- H01L21/308—Chemical or electrical treatment, e.g. electrolytic etching using masks
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0657—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape of the body
- H01L29/0661—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape of the body specially adapted for altering the breakdown voltage by removing semiconductor material at, or in the neighbourhood of, a reverse biased junction, e.g. by bevelling, moat etching, depletion etching
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Ceramic Engineering (AREA)
- Dicing (AREA)
- Formation Of Insulating Films (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
- Bipolar Transistors (AREA)
- Thyristors (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE19772751485 DE2751485A1 (de) | 1977-11-18 | 1977-11-18 | Verfahren zum herstellen von halbleiterkoerpern mit definiertem, durch aetzen erzielten und mit einem glas abgedeckten randprofil |
Publications (2)
Publication Number | Publication Date |
---|---|
FR2409598A1 FR2409598A1 (fr) | 1979-06-15 |
FR2409598B1 true FR2409598B1 (fr) | 1985-07-26 |
Family
ID=6024000
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR787832104A Expired FR2409598B1 (fr) | 1977-11-18 | 1978-11-14 | Procede pour fabriquer des corps semi-conducteurs a bord profile de forme definie obtenu par attaque chimique et muni d'un revetement en verre |
Country Status (8)
Country | Link |
---|---|
US (1) | US4228581A (fr) |
JP (1) | JPS5475990A (fr) |
BR (1) | BR7807597A (fr) |
CH (1) | CH635958A5 (fr) |
DE (1) | DE2751485A1 (fr) |
FR (1) | FR2409598B1 (fr) |
GB (1) | GB2008320B (fr) |
IT (1) | IT1102331B (fr) |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2469000A1 (fr) * | 1979-10-30 | 1981-05-08 | Silicium Semiconducteur Ssc | Structure de thyristor tres haute tension glassive et son procede de fabrication |
DE3137695A1 (de) * | 1981-09-22 | 1983-04-21 | Siemens AG, 1000 Berlin und 8000 München | Thyristor mit einem mehrschichten-halbleiterkoerper mit pnpn-schichtfolge und verfahren zu seiner herstellung |
DE3211391A1 (de) * | 1982-03-27 | 1983-09-29 | Licentia Patent-Verwaltungs-Gmbh, 6000 Frankfurt | Verfahren zum herstellen einer halbleiteranordnung |
JP2776457B2 (ja) * | 1992-12-29 | 1998-07-16 | インターナショナル・ビジネス・マシーンズ・コーポレイション | 半導体デバイスのクラックストップ形成方法及び半導体デバイス |
CN105453250A (zh) * | 2013-08-08 | 2016-03-30 | 夏普株式会社 | 半导体元件衬底及其制造方法 |
Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3152939A (en) * | 1960-08-12 | 1964-10-13 | Westinghouse Electric Corp | Process for preparing semiconductor members |
US3535774A (en) * | 1968-07-09 | 1970-10-27 | Rca Corp | Method of fabricating semiconductor devices |
US3608186A (en) * | 1969-10-30 | 1971-09-28 | Jearld L Hutson | Semiconductor device manufacture with junction passivation |
US3852876A (en) * | 1973-01-02 | 1974-12-10 | Gen Electric | High voltage power transistor and method for making |
US3972113A (en) * | 1973-05-14 | 1976-08-03 | Mitsubishi Denki Kabushiki Kaisha | Process of producing semiconductor devices |
JPS5046270A (fr) * | 1973-08-29 | 1975-04-24 | ||
JPS51118386A (en) * | 1975-04-11 | 1976-10-18 | Hitachi Ltd | Semiconductor unit |
JPS5299074A (en) * | 1976-02-16 | 1977-08-19 | Nec Home Electronics Ltd | Production of semiconductor device |
-
1977
- 1977-11-18 DE DE19772751485 patent/DE2751485A1/de not_active Ceased
-
1978
- 1978-11-02 CH CH1128178A patent/CH635958A5/de not_active IP Right Cessation
- 1978-11-09 JP JP13738178A patent/JPS5475990A/ja active Pending
- 1978-11-14 FR FR787832104A patent/FR2409598B1/fr not_active Expired
- 1978-11-14 US US05/960,649 patent/US4228581A/en not_active Expired - Lifetime
- 1978-11-16 IT IT29867/78A patent/IT1102331B/it active
- 1978-11-17 GB GB7845094A patent/GB2008320B/en not_active Expired
- 1978-11-17 BR BR7807597A patent/BR7807597A/pt unknown
Also Published As
Publication number | Publication date |
---|---|
DE2751485A1 (de) | 1979-05-23 |
BR7807597A (pt) | 1979-06-26 |
GB2008320B (en) | 1982-04-28 |
GB2008320A (en) | 1979-05-31 |
US4228581A (en) | 1980-10-21 |
FR2409598A1 (fr) | 1979-06-15 |
IT1102331B (it) | 1985-10-07 |
IT7829867A0 (it) | 1978-11-16 |
JPS5475990A (en) | 1979-06-18 |
CH635958A5 (de) | 1983-04-29 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
ST | Notification of lapse |