FR2404961A1 - Procede et systeme pour une conversion de code - Google Patents
Procede et systeme pour une conversion de codeInfo
- Publication number
- FR2404961A1 FR2404961A1 FR7827978A FR7827978A FR2404961A1 FR 2404961 A1 FR2404961 A1 FR 2404961A1 FR 7827978 A FR7827978 A FR 7827978A FR 7827978 A FR7827978 A FR 7827978A FR 2404961 A1 FR2404961 A1 FR 2404961A1
- Authority
- FR
- France
- Prior art keywords
- output
- code conversion
- holding
- signal
- inverting
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M7/00—Conversion of a code where information is represented by a given sequence or number of digits to a code where the same, similar or subset of information is represented by a different sequence or number of digits
- H03M7/30—Compression; Expansion; Suppression of unnecessary data, e.g. redundancy reduction
- H03M7/3002—Conversion to or from differential modulation
- H03M7/3048—Conversion to or from one-bit differential modulation only, e.g. delta modulation [DM]
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/60—Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers
- G06F7/68—Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers using pulse rate multipliers or dividers pulse rate multipliers or dividers per se
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Physics & Mathematics (AREA)
- Mathematical Optimization (AREA)
- Mathematical Analysis (AREA)
- Computing Systems (AREA)
- Mathematical Physics (AREA)
- Pure & Applied Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- Computational Mathematics (AREA)
- Dc Digital Transmission (AREA)
- Compression, Expansion, Code Conversion, And Decoders (AREA)
- Analogue/Digital Conversion (AREA)
Abstract
Le système de conversion de code selon la présente invention comprend un circuit de maintien 10 pour maintenir le signal à valeur multiple Xi (xi étant un nombre entier non négatif qui n'est pas supérieur à m, lequel est un nombre pair) à une période d'échantillonnage mT, un moyen 12 pour inverser son état de sortie lorsque le signal Xi correspond à un nombre impair et un moyen de calcul 13 recevant la sortie du circuit de maintien et la sortie qi (ki un << 1 >> ou un zéro binaire) du moyen d'inversion et délivrant une transformée Z ØY(Z)õ de signaux binaires à délivrer.
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11683777A JPS5451343A (en) | 1977-09-30 | 1977-09-30 | Code converter |
Publications (2)
Publication Number | Publication Date |
---|---|
FR2404961A1 true FR2404961A1 (fr) | 1979-04-27 |
FR2404961B1 FR2404961B1 (fr) | 1983-07-22 |
Family
ID=14696843
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR7827978A Granted FR2404961A1 (fr) | 1977-09-30 | 1978-09-29 | Procede et systeme pour une conversion de code |
Country Status (6)
Country | Link |
---|---|
US (1) | US4209771A (fr) |
JP (1) | JPS5451343A (fr) |
CA (1) | CA1132712A (fr) |
DE (1) | DE2842374C2 (fr) |
FR (1) | FR2404961A1 (fr) |
GB (1) | GB2005938B (fr) |
Families Citing this family (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS58219841A (ja) * | 1982-06-15 | 1983-12-21 | Kokusai Denshin Denwa Co Ltd <Kdd> | 標本化周波数の高速変換回路 |
FR2543380B1 (fr) * | 1983-03-24 | 1985-07-26 | Labo Cent Telecommunicat | Procede et dispositif de transcodage d'un signal numerique mic et application au codage analogique-numerique d'un signal analogique a large bande |
JP2501513Y2 (ja) * | 1989-04-27 | 1996-06-19 | 日本電気株式会社 | 並列直列変換器 |
US5657261A (en) * | 1995-04-17 | 1997-08-12 | Wilson; Dennis L. | Interpolation of digital signals using signal sample replication |
US7124221B1 (en) | 1999-10-19 | 2006-10-17 | Rambus Inc. | Low latency multi-level communication interface |
US7292629B2 (en) | 2002-07-12 | 2007-11-06 | Rambus Inc. | Selectable-tap equalizer |
CN100578941C (zh) | 2003-03-28 | 2010-01-06 | Ess科技有限公司 | 双二阶滤波器电路及其比特二进制比率倍增器 |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3737780A (en) * | 1970-05-11 | 1973-06-05 | Nippon Electric Co | Digital communication system employing unity bit per sampling coding method |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
NL162008B (nl) * | 1950-06-16 | Koppers Co Inc | Trekmachine met rupsbanden. | |
US3214749A (en) * | 1959-11-23 | 1965-10-26 | Bell Telephone Labor Inc | Three-level binary code transmission |
NL272025A (fr) * | 1960-12-19 | |||
US3226685A (en) * | 1961-06-02 | 1965-12-28 | Potter Instrument Co Inc | Digital recording systems utilizing ternary, n bit binary and other self-clocking forms |
US3623078A (en) * | 1969-11-14 | 1971-11-23 | Gen Dynamics Corp | Information handling system especially for magnetic recording and reproducing of digital data |
US4020282A (en) * | 1974-01-14 | 1977-04-26 | General Dynamics Corporation | High density data processing system |
-
1977
- 1977-09-30 JP JP11683777A patent/JPS5451343A/ja active Granted
-
1978
- 1978-09-19 US US05/943,618 patent/US4209771A/en not_active Expired - Lifetime
- 1978-09-22 GB GB7837836A patent/GB2005938B/en not_active Expired
- 1978-09-28 DE DE2842374A patent/DE2842374C2/de not_active Expired
- 1978-09-29 FR FR7827978A patent/FR2404961A1/fr active Granted
- 1978-09-29 CA CA312,363A patent/CA1132712A/fr not_active Expired
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3737780A (en) * | 1970-05-11 | 1973-06-05 | Nippon Electric Co | Digital communication system employing unity bit per sampling coding method |
Non-Patent Citations (1)
Title |
---|
EXBK/60 * |
Also Published As
Publication number | Publication date |
---|---|
FR2404961B1 (fr) | 1983-07-22 |
DE2842374C2 (de) | 1982-07-01 |
GB2005938B (en) | 1982-01-27 |
JPS623618B2 (fr) | 1987-01-26 |
CA1132712A (fr) | 1982-09-28 |
JPS5451343A (en) | 1979-04-23 |
US4209771A (en) | 1980-06-24 |
DE2842374A1 (de) | 1979-04-05 |
GB2005938A (en) | 1979-04-25 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
ST | Notification of lapse |