FR2392495A1 - Procede de realisation de dispositifs semi-conducteurs a reseau de conducteurs mono ou multicouche et dispositifs ainsi obtenus - Google Patents

Procede de realisation de dispositifs semi-conducteurs a reseau de conducteurs mono ou multicouche et dispositifs ainsi obtenus

Info

Publication number
FR2392495A1
FR2392495A1 FR7715895A FR7715895A FR2392495A1 FR 2392495 A1 FR2392495 A1 FR 2392495A1 FR 7715895 A FR7715895 A FR 7715895A FR 7715895 A FR7715895 A FR 7715895A FR 2392495 A1 FR2392495 A1 FR 2392495A1
Authority
FR
France
Prior art keywords
auxiliary layer
active surface
recess
parts
semiconductor device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
FR7715895A
Other languages
English (en)
Other versions
FR2392495B1 (fr
Inventor
Michel De Brebisson
Daniel Diguet
Marc Tessier
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Radiotechnique Compelec RTC SA
Original Assignee
Radiotechnique Compelec RTC SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Radiotechnique Compelec RTC SA filed Critical Radiotechnique Compelec RTC SA
Priority to FR7715895A priority Critical patent/FR2392495A1/fr
Publication of FR2392495A1 publication Critical patent/FR2392495A1/fr
Application granted granted Critical
Publication of FR2392495B1 publication Critical patent/FR2392495B1/fr
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02118—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer carbon based polymeric organic or inorganic material, e.g. polyimides, poly cyclobutene or PVC
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02164—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/0217—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02282—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process liquid deposition, e.g. spin-coating, sol-gel techniques, spray coating
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/0271—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
    • H01L21/0272—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers for lift-off processes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
    • H01L21/7688—Filling of holes, grooves or trenches, e.g. vias, with conductive material by deposition over sacrificial masking layer, e.g. lift-off

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Formation Of Insulating Films (AREA)

Abstract

Procédé de réalisation de la configuration des conducteurs assurant les liaisons électriques sur un cristal semi-conducteur. La configuration est créée dans une pellicule conductrice dont des nappes reposant sur une couche auxiliaire sont éliminées lorsqu'on élimine ladite couche auxiliaire, cette couche auxiliaire étant en un corps choisi parmi les polyimides, les polyamides-imides, les polyimides modifiés par un amide, les acides polyamides, les polyamino-imides. Application aux circuits intégrés à configuration de conducteurs multicouche.
FR7715895A 1977-05-25 1977-05-25 Procede de realisation de dispositifs semi-conducteurs a reseau de conducteurs mono ou multicouche et dispositifs ainsi obtenus Granted FR2392495A1 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
FR7715895A FR2392495A1 (fr) 1977-05-25 1977-05-25 Procede de realisation de dispositifs semi-conducteurs a reseau de conducteurs mono ou multicouche et dispositifs ainsi obtenus

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR7715895A FR2392495A1 (fr) 1977-05-25 1977-05-25 Procede de realisation de dispositifs semi-conducteurs a reseau de conducteurs mono ou multicouche et dispositifs ainsi obtenus

Publications (2)

Publication Number Publication Date
FR2392495A1 true FR2392495A1 (fr) 1978-12-22
FR2392495B1 FR2392495B1 (fr) 1980-01-04

Family

ID=9191237

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7715895A Granted FR2392495A1 (fr) 1977-05-25 1977-05-25 Procede de realisation de dispositifs semi-conducteurs a reseau de conducteurs mono ou multicouche et dispositifs ainsi obtenus

Country Status (1)

Country Link
FR (1) FR2392495A1 (fr)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0028994A2 (fr) * 1979-11-09 1981-05-20 Rhone-Poulenc Specialites Chimiques Compositions et procédé d'encapsulation de composants électroniques à l'aide d'une matière moulable à base d'un prépolymère thermodurcissable
EP0090612A2 (fr) * 1982-03-26 1983-10-05 Unisys Corporation Procédé de fabrication de dispositifs à jonction Josephson
EP0100735A2 (fr) * 1982-08-02 1984-02-15 FAIRCHILD CAMERA & INSTRUMENT CORPORATION Procédé de "lift-off" pour la fabrication de contacts autoalignés
EP0261400A2 (fr) * 1986-08-27 1988-03-30 Hitachi, Ltd. Procédé de "lift-off" pour la formation d'une configuration métallique sur un substrat
EP0285245A1 (fr) * 1987-02-27 1988-10-05 AT&T Corp. Construction d'un dispositif à l'aide de la planarisation
EP0805489A2 (fr) * 1996-04-29 1997-11-05 Applied Materials, Inc. Remplissage selectif des trous de liaison utilisant une couche sacrificielle

Cited By (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0028994A2 (fr) * 1979-11-09 1981-05-20 Rhone-Poulenc Specialites Chimiques Compositions et procédé d'encapsulation de composants électroniques à l'aide d'une matière moulable à base d'un prépolymère thermodurcissable
FR2469421A1 (fr) * 1979-11-09 1981-05-22 Rhone Poulenc Ind Procede d'encapsulation de composants electroniques a l'aide d'une matiere moulable a base d'un prepolymere thermodurcissable
EP0028994A3 (en) * 1979-11-09 1981-05-27 Rhone-Poulenc Specialites Chimiques Process for the encapsulation of electronic components with the aid of a mouldable material based on a thermosetting prepolymer, and articles obtained by this process
EP0090612A3 (en) * 1982-03-26 1986-10-15 Sperry Corporation Method of making josephson junction devices
EP0090612A2 (fr) * 1982-03-26 1983-10-05 Unisys Corporation Procédé de fabrication de dispositifs à jonction Josephson
EP0100735A2 (fr) * 1982-08-02 1984-02-15 FAIRCHILD CAMERA & INSTRUMENT CORPORATION Procédé de "lift-off" pour la fabrication de contacts autoalignés
EP0100735A3 (en) * 1982-08-02 1984-10-24 Fairchild Camera & Instrument Corporation Lift-off process for fabricating self-aligned contacts
EP0261400A2 (fr) * 1986-08-27 1988-03-30 Hitachi, Ltd. Procédé de "lift-off" pour la formation d'une configuration métallique sur un substrat
EP0261400A3 (en) * 1986-08-27 1989-05-24 Hitachi, Ltd. Lift-off process for forming wiring on a substrate
US4886573A (en) * 1986-08-27 1989-12-12 Hitachi, Ltd. Process for forming wiring on substrate
EP0285245A1 (fr) * 1987-02-27 1988-10-05 AT&T Corp. Construction d'un dispositif à l'aide de la planarisation
EP0805489A2 (fr) * 1996-04-29 1997-11-05 Applied Materials, Inc. Remplissage selectif des trous de liaison utilisant une couche sacrificielle
EP0805489A3 (fr) * 1996-04-29 1999-02-03 Applied Materials, Inc. Remplissage selectif des trous de liaison utilisant une couche sacrificielle

Also Published As

Publication number Publication date
FR2392495B1 (fr) 1980-01-04

Similar Documents

Publication Publication Date Title
DE2966093D1 (en) Method for forming an insulating film layer on a semiconductor substrate surface
NL7706108A (nl) Werkwijze voor het vormen van een patroon van geleiders op een op een substraat aangebrachte isolerende laag.
JPS55130842A (en) Method and device for continuously depositing solid substance layer on surface of substrate with high temperature
JPS6432663A (en) Multilayer interconnection system for multi-chip high performance semiconductor package
FR2392495A1 (fr) Procede de realisation de dispositifs semi-conducteurs a reseau de conducteurs mono ou multicouche et dispositifs ainsi obtenus
JPS5334484A (en) Forming method for multi layer wiring
JPS5240969A (en) Process for production of semiconductor device
JPS55121669A (en) Method of forming inactive layer on integrated circuit device having substrate of semiconductor material
JPS5748249A (en) Semiconductor device
JPS5484932A (en) Forming method of multi-layer construction
JPS5261980A (en) Production of semiconductor device
JPS6417446A (en) Semiconductor device and manufacture thereof
JPS5779648A (en) Multilayer wiring of semiconductor device
JPS5317583A (en) Process for forming vacuum evaporation layer on largeesized substrate surface
JPS57133667A (en) Manufacture of semiconductor device
JPS5690535A (en) Production of integrated multilayer wiring strcuture
JPS568834A (en) Manufacture of projection for substrate conductor layer
JPS57172752A (en) Semiconductor device
JPS5649541A (en) Multilayer wiring structure for integrated circuit
JPS6411379A (en) Superconducting film structure
JPS5746895A (en) Thermal printing device
JPS5469380A (en) Production of display electrode substrate
JPS54113277A (en) Production of semiconductor device
FR2363193A1 (fr) Procede de realisation d'un dispositif semi-conducteur et dispositif ainsi obtenu
JPS56130951A (en) Manufacture of semiconductor device

Legal Events

Date Code Title Description
ST Notification of lapse