FR2363889B1 - - Google Patents

Info

Publication number
FR2363889B1
FR2363889B1 FR7726691A FR7726691A FR2363889B1 FR 2363889 B1 FR2363889 B1 FR 2363889B1 FR 7726691 A FR7726691 A FR 7726691A FR 7726691 A FR7726691 A FR 7726691A FR 2363889 B1 FR2363889 B1 FR 2363889B1
Authority
FR
France
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
FR7726691A
Other languages
French (fr)
Other versions
FR2363889A1 (fr
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fairchild Semiconductor Corp
Original Assignee
Fairchild Camera and Instrument Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fairchild Camera and Instrument Corp filed Critical Fairchild Camera and Instrument Corp
Publication of FR2363889A1 publication Critical patent/FR2363889A1/fr
Application granted granted Critical
Publication of FR2363889B1 publication Critical patent/FR2363889B1/fr
Granted legal-status Critical Current

Links

Classifications

    • H10W20/021—
    • H10W10/0121—
    • H10W10/0126—
    • H10W10/13—
FR7726691A 1976-09-03 1977-09-02 Procede de fabrication de regions enterrees conductrices dans des circuits integres et structures resultantes Granted FR2363889A1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US05/720,550 US4149177A (en) 1976-09-03 1976-09-03 Method of fabricating conductive buried regions in integrated circuits and the resulting structures

Publications (2)

Publication Number Publication Date
FR2363889A1 FR2363889A1 (fr) 1978-03-31
FR2363889B1 true FR2363889B1 (ref) 1983-01-14

Family

ID=24894399

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7726691A Granted FR2363889A1 (fr) 1976-09-03 1977-09-02 Procede de fabrication de regions enterrees conductrices dans des circuits integres et structures resultantes

Country Status (6)

Country Link
US (1) US4149177A (ref)
JP (1) JPS5331984A (ref)
CA (1) CA1085064A (ref)
DE (1) DE2738049A1 (ref)
FR (1) FR2363889A1 (ref)
GB (1) GB1577420A (ref)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2413782A1 (fr) * 1977-12-30 1979-07-27 Radiotechnique Compelec Element de circuit integre destine aux memoires bipolaires a isolement lateral par oxyde
US4231056A (en) * 1978-10-20 1980-10-28 Harris Corporation Moat resistor ram cell
US4277882A (en) * 1978-12-04 1981-07-14 Fairchild Camera And Instrument Corporation Method of producing a metal-semiconductor field-effect transistor
JPS5799771A (en) * 1980-12-12 1982-06-21 Hitachi Ltd Semiconductor device
US4624046A (en) * 1982-01-04 1986-11-25 Fairchild Camera & Instrument Corp. Oxide isolation process for standard RAM/PROM and lateral PNP cell RAM
US4961102A (en) * 1982-01-04 1990-10-02 Shideler Jay A Junction programmable vertical transistor with high performance transistor
JPS58199537A (ja) * 1982-05-14 1983-11-19 Matsushita Electric Ind Co Ltd 高抵抗半導体層の製造方法
US4549927A (en) * 1984-06-29 1985-10-29 International Business Machines Corporation Method of selectively exposing the sidewalls of a trench and its use to the forming of a metal silicide substrate contact for dielectric filled deep trench isolated devices
US5023200A (en) * 1988-11-22 1991-06-11 The United States Of America As Represented By The United States Department Of Energy Formation of multiple levels of porous silicon for buried insulators and conductors in silicon device technologies

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL170348C (nl) * 1970-07-10 1982-10-18 Philips Nv Werkwijze voor het vervaardigen van een halfgeleiderinrichting, waarbij op een oppervlak van een halfgeleiderlichaam een tegen dotering en tegen thermische oxydatie maskerend masker wordt aangebracht, de door de vensters in het masker vrijgelaten delen van het oppervlak worden onderworpen aan een etsbehandeling voor het vormen van verdiepingen en het halfgeleiderlichaam met het masker wordt onderworpen aan een thermische oxydatiebehandeling voor het vormen van een oxydepatroon dat de verdiepingen althans ten dele opvult.
US3648125A (en) * 1971-02-02 1972-03-07 Fairchild Camera Instr Co Method of fabricating integrated circuits with oxidized isolation and the resulting structure
NL170901C (nl) * 1971-04-03 1983-01-03 Philips Nv Werkwijze voor het vervaardigen van een halfgeleiderinrichting.
JPS4975280A (ref) * 1972-11-24 1974-07-19
US3975752A (en) * 1973-04-04 1976-08-17 Harris Corporation Junction field effect transistor
US3962717A (en) * 1974-10-29 1976-06-08 Fairchild Camera And Instrument Corporation Oxide isolated integrated injection logic with selective guard ring

Also Published As

Publication number Publication date
CA1085064A (en) 1980-09-02
GB1577420A (en) 1980-10-22
DE2738049A1 (de) 1978-03-09
JPS5331984A (en) 1978-03-25
FR2363889A1 (fr) 1978-03-31
JPS6224944B2 (ref) 1987-05-30
US4149177A (en) 1979-04-10

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Legal Events

Date Code Title Description
ST Notification of lapse