FR2360937A1 - Circuit rythmeur a allongement et mise en attente - Google Patents

Circuit rythmeur a allongement et mise en attente

Info

Publication number
FR2360937A1
FR2360937A1 FR7723677A FR7723677A FR2360937A1 FR 2360937 A1 FR2360937 A1 FR 2360937A1 FR 7723677 A FR7723677 A FR 7723677A FR 7723677 A FR7723677 A FR 7723677A FR 2360937 A1 FR2360937 A1 FR 2360937A1
Authority
FR
France
Prior art keywords
circuit
electronic
signal
coupled
extension
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
FR7723677A
Other languages
English (en)
Other versions
FR2360937B1 (fr
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Bull HN Information Systems Italia SpA
Bull HN Information Systems Inc
Original Assignee
Honeywell Information Systems Italia SpA
Honeywell Information Systems Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Honeywell Information Systems Italia SpA, Honeywell Information Systems Inc filed Critical Honeywell Information Systems Italia SpA
Publication of FR2360937A1 publication Critical patent/FR2360937A1/fr
Application granted granted Critical
Publication of FR2360937B1 publication Critical patent/FR2360937B1/fr
Expired legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/04Generating or distributing clock signals or signals derived directly therefrom
    • G06F1/08Clock generators with changeable or programmable clock frequency

Abstract

L'invention concerne un circuit rythmeur à allongement et mise en attente. Un circuit rythmeur selon l'invention est caractérisé par un premier circuit 101 pour retarder un signal électronique d'un premier temps prédeterminé, un second circuit 102 couplé au premier pour retarder le signal électronique d'une seconde quantité prédéterminée, un troisième circuit électronique 108 couplé au premier circuit électronique pour produire un premier signal rectangulaire alternatif ayant une période prédeterminée et un quatrième circuit électronique 104 couplé au premier, au second et au troisième circuit électronique et répondant à un premier signal de demande pour augmenter la période du premier signal rectangulaire alternatif d'une quantité prédéterminée. Un circuit selon l'invention convient en particulier pour un ordinateur avec des équipements périphériques.
FR7723677A 1976-08-02 1977-08-01 Circuit rythmeur a allongement et mise en attente Expired FR2360937B1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US05/710,540 US4105978A (en) 1976-08-02 1976-08-02 Stretch and stall clock

Publications (2)

Publication Number Publication Date
FR2360937A1 true FR2360937A1 (fr) 1978-03-03
FR2360937B1 FR2360937B1 (fr) 1985-11-22

Family

ID=24854448

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7723677A Expired FR2360937B1 (fr) 1976-08-02 1977-08-01 Circuit rythmeur a allongement et mise en attente

Country Status (6)

Country Link
US (1) US4105978A (fr)
JP (1) JPS5341142A (fr)
AU (1) AU508708B2 (fr)
DE (1) DE2734190C2 (fr)
FR (1) FR2360937B1 (fr)
GB (1) GB1590846A (fr)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4241418A (en) * 1977-11-23 1980-12-23 Honeywell Information Systems Inc. Clock system having a dynamically selectable clock period
US4302735A (en) * 1979-05-07 1981-11-24 Honeywell Information Systems Inc. Delay line compensation network
JPS6218709Y2 (fr) * 1980-05-28 1987-05-13
US4458308A (en) * 1980-10-06 1984-07-03 Honeywell Information Systems Inc. Microprocessor controlled communications controller having a stretched clock cycle
US4636656A (en) * 1984-05-21 1987-01-13 Motorola, Inc. Circuit for selectively extending a cycle of a clock signal
US4691121A (en) * 1985-11-29 1987-09-01 Tektronix, Inc. Digital free-running clock synchronizer
US5313108A (en) * 1992-04-17 1994-05-17 Picopower Technology, Inc. Circuit for generating a stretched clock signal by one period or one-half period
KR960019978A (ko) * 1994-11-23 1996-06-17 문정환 펄스 발생기
ES2159245B1 (es) * 1999-07-23 2002-04-01 Univ Catalunya Politecnica Linea de retardo multiple y ajustable para sistemas electronicos.
JP3891877B2 (ja) * 2002-04-26 2007-03-14 富士通株式会社 クロック信号発生装置、通信装置および半導体装置

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3162815A (en) * 1961-11-02 1964-12-22 Rca Corp Sequential pulse generator employing first and second delay means controlling pulse duration and spacing, respectively
US3418498A (en) * 1965-10-29 1968-12-24 Westinghouse Electric Corp Delay line timing circuit for use with computer or other timed operation devices
FR1600134A (fr) * 1968-03-08 1970-07-20
US3628065A (en) * 1970-10-27 1971-12-14 Bell Telephone Labor Inc Clock pulse generator

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3248657A (en) * 1963-10-18 1966-04-26 Rca Corp Pulse generator employing serially connected delay lines
US3633113A (en) * 1969-12-22 1972-01-04 Ibm Timed pulse train generating system
US3675133A (en) * 1971-06-21 1972-07-04 Ibm Apparatus and method independently varying the widths of a plurality of pulses

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3162815A (en) * 1961-11-02 1964-12-22 Rca Corp Sequential pulse generator employing first and second delay means controlling pulse duration and spacing, respectively
US3418498A (en) * 1965-10-29 1968-12-24 Westinghouse Electric Corp Delay line timing circuit for use with computer or other timed operation devices
FR1600134A (fr) * 1968-03-08 1970-07-20
US3628065A (en) * 1970-10-27 1971-12-14 Bell Telephone Labor Inc Clock pulse generator

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
EXBK/74 *

Also Published As

Publication number Publication date
JPS6232486B2 (fr) 1987-07-15
FR2360937B1 (fr) 1985-11-22
US4105978A (en) 1978-08-08
DE2734190C2 (de) 1984-11-22
GB1590846A (en) 1981-06-10
DE2734190A1 (de) 1978-02-09
AU508708B2 (en) 1980-03-27
AU2748677A (en) 1979-02-08
JPS5341142A (en) 1978-04-14

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Legal Events

Date Code Title Description
ST Notification of lapse