FR2356277B1 - - Google Patents

Info

Publication number
FR2356277B1
FR2356277B1 FR7718024A FR7718024A FR2356277B1 FR 2356277 B1 FR2356277 B1 FR 2356277B1 FR 7718024 A FR7718024 A FR 7718024A FR 7718024 A FR7718024 A FR 7718024A FR 2356277 B1 FR2356277 B1 FR 2356277B1
Authority
FR
France
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
FR7718024A
Other versions
FR2356277A1 (fr
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Siemens AG
Original Assignee
Siemens AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens AG filed Critical Siemens AG
Publication of FR2356277A1 publication Critical patent/FR2356277A1/fr
Application granted granted Critical
Publication of FR2356277B1 publication Critical patent/FR2356277B1/fr
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
    • H01L21/26506—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors
    • H01L21/26513—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors of electrically active species
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/322—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections
    • H01L21/3221—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections of silicon bodies, e.g. for gettering
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/08—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/0804—Emitter regions of bipolar transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/30—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by physical imperfections; having polished or roughened surface
    • H01L29/32—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by physical imperfections; having polished or roughened surface the imperfections being within the semiconductor body
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/024—Defect control-gettering and annealing
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/061—Gettering-armorphous layers
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/093—Laser beam treatment in general

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • High Energy & Nuclear Physics (AREA)
  • Ceramic Engineering (AREA)
  • Toxicology (AREA)
  • Health & Medical Sciences (AREA)
  • Bipolar Transistors (AREA)
FR7718024A 1976-06-22 1977-06-13 Composant a semi-conducteurs comportant au moins deux zones possedant des types de conductivite differents et formant une jonction pn, et procede pour sa fabrication Granted FR2356277A1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19762627855 DE2627855A1 (de) 1976-06-22 1976-06-22 Halbleiterbauelement mit wenigstens zwei, einen pn-uebergang bildenden zonen unterschiedlichen leitungstyps sowie verfahren zu dessen herstellung

Publications (2)

Publication Number Publication Date
FR2356277A1 FR2356277A1 (fr) 1978-01-20
FR2356277B1 true FR2356277B1 (fr) 1982-05-14

Family

ID=5981107

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7718024A Granted FR2356277A1 (fr) 1976-06-22 1977-06-13 Composant a semi-conducteurs comportant au moins deux zones possedant des types de conductivite differents et formant une jonction pn, et procede pour sa fabrication

Country Status (6)

Country Link
US (1) US4216030A (fr)
JP (1) JPS531476A (fr)
DE (1) DE2627855A1 (fr)
FR (1) FR2356277A1 (fr)
GB (1) GB1558937A (fr)
IT (1) IT1078689B (fr)

Families Citing this family (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2917455A1 (de) * 1979-04-30 1980-11-13 Ibm Deutschland Verfahren zur vollstaendigen ausheilung von gitterdefekten in durch ionenimplantation von phosphor erzeugten n-leitenden zonen einer siliciumhalbleitervorrichtung und zugehoerige siliciumhalbleitervorrichtung
US4452645A (en) * 1979-11-13 1984-06-05 International Business Machines Corporation Method of making emitter regions by implantation through a non-monocrystalline layer
US4301588A (en) * 1980-02-01 1981-11-24 International Business Machines Corporation Consumable amorphous or polysilicon emitter process
US4315782A (en) * 1980-07-21 1982-02-16 Rca Corporation Method of making semiconductor device with passivated rectifying junctions having hydrogenated amorphous regions
US4391651A (en) * 1981-10-15 1983-07-05 The United States Of America As Represented By The Secretary Of The Navy Method of forming a hyperabrupt interface in a GaAs substrate
JPS58132922A (ja) * 1982-02-01 1983-08-08 Toshiba Corp 半導体装置の製造方法
US4456489A (en) * 1982-10-15 1984-06-26 Motorola, Inc. Method of forming a shallow and high conductivity boron doped layer in silicon
JPS59204229A (ja) * 1983-05-04 1984-11-19 Sony Corp 半導体装置の製造方法
US4710477A (en) * 1983-09-12 1987-12-01 Hughes Aircraft Company Method for forming latch-up immune, multiple retrograde well high density CMOS FET
US4633289A (en) * 1983-09-12 1986-12-30 Hughes Aircraft Company Latch-up immune, multiple retrograde well high density CMOS FET
US4606443A (en) * 1983-11-30 1986-08-19 Harada Industry Co., Ltd. Planetary drive with overload clutch release means for an antenna
US4617066A (en) * 1984-11-26 1986-10-14 Hughes Aircraft Company Process of making semiconductors having shallow, hyperabrupt doped regions by implantation and two step annealing
US4775641A (en) * 1986-09-25 1988-10-04 General Electric Company Method of making silicon-on-sapphire semiconductor devices
GB2213988B (en) * 1987-12-18 1992-02-05 Matsushita Electric Works Ltd Semiconductor device
JP3313432B2 (ja) * 1991-12-27 2002-08-12 株式会社東芝 半導体装置及びその製造方法
US5286660A (en) * 1992-12-24 1994-02-15 Motorola, Inc. Method for doping a semiconductor wafer having a diffusivity enhancement region
JP3311210B2 (ja) * 1995-07-28 2002-08-05 株式会社東芝 半導体装置およびその製造方法
JP2848439B2 (ja) * 1995-11-10 1999-01-20 日本電気株式会社 半導体装置の製造方法
US5976956A (en) * 1997-04-11 1999-11-02 Advanced Micro Devices, Inc. Method of controlling dopant concentrations using transient-enhanced diffusion prior to gate formation in a device

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3655457A (en) * 1968-08-06 1972-04-11 Ibm Method of making or modifying a pn-junction by ion implantation
US3810791A (en) * 1970-08-03 1974-05-14 Texas Instruments Inc Process for the fabrication of semiconductor materials
US3918996A (en) * 1970-11-02 1975-11-11 Texas Instruments Inc Formation of integrated circuits using proton enhanced diffusion
US3900345A (en) * 1973-08-02 1975-08-19 Motorola Inc Thin low temperature epi regions by conversion of an amorphous layer
FR2241144A1 (en) * 1973-08-14 1975-03-14 Radiotechnique Compelec Semi-conductors for transit time and avalanche diodes - having concentration profiles with steep gradients in opposing directions
US3925106A (en) * 1973-12-26 1975-12-09 Ibm Ion bombardment method of producing integrated semiconductor circuit resistors of low temperature coefficient of resistance
DE2449688C3 (de) * 1974-10-18 1980-07-10 Siemens Ag, 1000 Berlin Und 8000 Muenchen Verfahren zur Herstellung einer dotierten Zone eines Leitfähigkeitstyps in einem Halbleiterkörper
JPS51123562A (en) * 1975-04-21 1976-10-28 Sony Corp Production method of semiconductor device
US4056408A (en) * 1976-03-17 1977-11-01 Westinghouse Electric Corporation Reducing the switching time of semiconductor devices by nuclear irradiation

Also Published As

Publication number Publication date
DE2627855A1 (de) 1977-12-29
JPS531476A (en) 1978-01-09
US4216030A (en) 1980-08-05
FR2356277A1 (fr) 1978-01-20
IT1078689B (it) 1985-05-08
GB1558937A (en) 1980-01-09

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Legal Events

Date Code Title Description
ST Notification of lapse