FR2344093B1 - - Google Patents
Info
- Publication number
- FR2344093B1 FR2344093B1 FR7606877A FR7606877A FR2344093B1 FR 2344093 B1 FR2344093 B1 FR 2344093B1 FR 7606877 A FR7606877 A FR 7606877A FR 7606877 A FR7606877 A FR 7606877A FR 2344093 B1 FR2344093 B1 FR 2344093B1
- Authority
- FR
- France
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
- G06F12/0806—Multiuser, multiprocessor or multiprocessing cache systems
- G06F12/0811—Multiuser, multiprocessor or multiprocessing cache systems with multilevel cache hierarchies
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Multi Processors (AREA)
- Test And Diagnosis Of Digital Computers (AREA)
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| FR7606877A FR2344093A1 (fr) | 1976-03-10 | 1976-03-10 | Systeme de gestion coherente d'une hierarchie de memoires |
| DE19772710502 DE2710502A1 (de) | 1976-03-10 | 1977-03-10 | Anordnung zur kohaerenten leitung einer speicherhierarchie |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| FR7606877A FR2344093A1 (fr) | 1976-03-10 | 1976-03-10 | Systeme de gestion coherente d'une hierarchie de memoires |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| FR2344093A1 FR2344093A1 (fr) | 1977-10-07 |
| FR2344093B1 true FR2344093B1 (enExample) | 1978-12-08 |
Family
ID=9170232
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| FR7606877A Granted FR2344093A1 (fr) | 1976-03-10 | 1976-03-10 | Systeme de gestion coherente d'une hierarchie de memoires |
Country Status (2)
| Country | Link |
|---|---|
| DE (1) | DE2710502A1 (enExample) |
| FR (1) | FR2344093A1 (enExample) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0325421B1 (en) * | 1988-01-20 | 1994-08-10 | Advanced Micro Devices, Inc. | Organization of an integrated cache unit for flexible usage in supporting multiprocessor operations |
| ATE138212T1 (de) * | 1988-01-20 | 1996-06-15 | Advanced Micro Devices Inc | Integrierte cachespeichereinheit |
| US5136691A (en) * | 1988-01-20 | 1992-08-04 | Advanced Micro Devices, Inc. | Methods and apparatus for caching interlock variables in an integrated cache memory |
-
1976
- 1976-03-10 FR FR7606877A patent/FR2344093A1/fr active Granted
-
1977
- 1977-03-10 DE DE19772710502 patent/DE2710502A1/de not_active Ceased
Also Published As
| Publication number | Publication date |
|---|---|
| DE2710502A1 (de) | 1977-09-22 |
| FR2344093A1 (fr) | 1977-10-07 |