FR2316804A1 - Dispositif semi-conducteur a logique d'injection plurivalente - Google Patents

Dispositif semi-conducteur a logique d'injection plurivalente

Info

Publication number
FR2316804A1
FR2316804A1 FR7619973A FR7619973A FR2316804A1 FR 2316804 A1 FR2316804 A1 FR 2316804A1 FR 7619973 A FR7619973 A FR 7619973A FR 7619973 A FR7619973 A FR 7619973A FR 2316804 A1 FR2316804 A1 FR 2316804A1
Authority
FR
France
Prior art keywords
plurivalent
semiconductor device
injection logic
logic
injection
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
FR7619973A
Other languages
English (en)
Other versions
FR2316804B1 (fr
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Signetics Corp
Original Assignee
Signetics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Signetics Corp filed Critical Signetics Corp
Publication of FR2316804A1 publication Critical patent/FR2316804A1/fr
Application granted granted Critical
Publication of FR2316804B1 publication Critical patent/FR2316804B1/fr
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/50—Adding; Subtracting
    • G06F7/501—Half or full adders, i.e. basic adder cells for one denomination
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/0203—Particular design considerations for integrated circuits
    • H01L27/0214—Particular design considerations for integrated circuits for internal polarisation, e.g. I2L
    • H01L27/0229—Particular design considerations for integrated circuits for internal polarisation, e.g. I2L of bipolar structures
    • H01L27/0233—Integrated injection logic structures [I2L]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
    • H01L27/082—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including bipolar components only
    • H01L27/0821—Combination of lateral and vertical transistors only
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/082—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using bipolar transistors
    • H03K19/091—Integrated injection logic or merged transistor logic
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2207/00—Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F2207/38—Indexing scheme relating to groups G06F7/38 - G06F7/575
    • G06F2207/48—Indexing scheme relating to groups G06F7/48 - G06F7/575
    • G06F2207/4802—Special implementations
    • G06F2207/4818—Threshold devices
    • G06F2207/4822—Majority gates

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • General Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computing Systems (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Pure & Applied Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Mathematical Optimization (AREA)
  • Bipolar Integrated Circuits (AREA)
  • Bipolar Transistors (AREA)
  • Logic Circuits (AREA)
FR7619973A 1975-06-30 1976-06-30 Dispositif semi-conducteur a logique d'injection plurivalente Granted FR2316804A1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US05/591,400 US4081822A (en) 1975-06-30 1975-06-30 Threshold integrated injection logic

Publications (2)

Publication Number Publication Date
FR2316804A1 true FR2316804A1 (fr) 1977-01-28
FR2316804B1 FR2316804B1 (fr) 1979-07-27

Family

ID=24366337

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7619973A Granted FR2316804A1 (fr) 1975-06-30 1976-06-30 Dispositif semi-conducteur a logique d'injection plurivalente

Country Status (8)

Country Link
US (1) US4081822A (fr)
JP (1) JPS5220756A (fr)
CA (1) CA1085467A (fr)
DE (1) DE2627574C3 (fr)
FR (1) FR2316804A1 (fr)
GB (1) GB1555231A (fr)
IT (1) IT1061814B (fr)
NL (1) NL7606935A (fr)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2417113A1 (fr) * 1978-02-14 1979-09-07 Motorola Inc Convertisseur differentiel a une sortie
FR2509102A1 (fr) * 1981-07-03 1983-01-07 Trt Telecom Radio Electr Commutateur analogique de courant en technologie bipolaire a injection

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS529384A (en) * 1975-07-11 1977-01-24 Nippon Telegr & Teleph Corp <Ntt> Transistor circuit device
US4140920A (en) * 1976-08-27 1979-02-20 Signetics Corporation Multivalued integrated injection logic circuitry and method
GB1584724A (en) * 1977-07-14 1981-02-18 Philips Electronic Associated Integrated injection logic circuits
US4180749A (en) * 1977-07-18 1979-12-25 Texas Instruments Incorporated Input buffer for integrated injection logic circuits
JPS5459088A (en) * 1977-10-20 1979-05-12 Toshiba Corp Integrated circuit
DE2805835C2 (de) * 1978-02-11 1982-08-26 Deutsche Itt Industries Gmbh, 7800 Freiburg Monolithisch integrierte Schaltung zur Umsetzung eines binärcodierten Signals in ein abgestuftes Analogsignal
DE2835330C3 (de) * 1978-08-11 1982-03-11 Siemens AG, 1000 Berlin und 8000 München Integrierter bipolarer Halbleiterschaltkreis sowie Verfahren zu seiner Herstellung
US4709159A (en) * 1980-02-19 1987-11-24 Motorola, Inc. Capacitance multiplier circuit
JPS56152261A (en) * 1980-04-28 1981-11-25 Toshiba Corp I2l element withstanding high surge
JPS57176829A (en) * 1981-04-22 1982-10-30 Toshiba Corp Current source circuit for d/a conversion
US4739252A (en) * 1986-04-24 1988-04-19 International Business Machines Corporation Current attenuator useful in a very low leakage current measuring device
GB8729417D0 (en) * 1987-12-17 1988-02-03 Plessey Co Plc Logic gate
US4843448A (en) * 1988-04-18 1989-06-27 The United States Of America As Represented By The Secretary Of The Navy Thin-film integrated injection logic
JP6858413B2 (ja) * 2016-03-15 2021-04-14 アイディール パワー インコーポレイテッド 偶発的なターンオンを防止する受動素子を備える二重ベース接続バイポーラトランジスタ

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL272700A (fr) * 1960-12-20
US3248529A (en) * 1962-04-20 1966-04-26 Ibm Full adder
US3275812A (en) * 1963-07-29 1966-09-27 Gen Electric Threshold gate adder for minimizing carry propagation
US3522445A (en) * 1966-08-24 1970-08-04 Bunker Ramo Threshold and majority gate elements and logical arrangements thereof
DE2021824C3 (de) * 1970-05-05 1980-08-14 Ibm Deutschland Gmbh, 7000 Stuttgart Monolithische Halbleiterschaltung
US3838393A (en) * 1973-12-17 1974-09-24 Signetics Corp Threshold logic gate
US3914622A (en) * 1974-02-08 1975-10-21 Fairchild Camera Instr Co Latch circuit with noise suppression
US3916215A (en) * 1974-03-11 1975-10-28 Hughes Aircraft Co Programmable ECL threshold logic gate

Non-Patent Citations (4)

* Cited by examiner, † Cited by third party
Title
"ELECTRONICS", VOLUME 47, NO. 20, 3 OCTOBRE 1974, NEW YORK HART ET AUTRES: "BIPOLAR LSI TAKES A NEW DIRECTION WITH INTEGRATED INJECTION LOGIC", PAGES 111-118) *
"ELECTRONICS", VOLUME 48, NO. 3, 6 FEVRIER 1975, NEW YORK, HORTON ET AUTRES: "I2L TAKES BIPOLAR INTEGRATION A SIGNIFICANT STREP FORWARD", PAGES 83-90 *
IEEE JOURNAL OF SOLID-STATE CIRCUITS", VOLUME SC-7, NO. 5, OCTOBRE 1972, NEW YORK BERGER ET WIEDMANN: "MERGED-TRANSISTOR LOGIC MTL-A LOW COST BIPOLAR LOGIC CONCEPT", PAGES 340-346 *
PHILIPS TECHNISCH TIJDSCHRIFT", VOLUME 33, NO. 3, 1973, EINDHOVEN NL HART ET SLOB: "INTEGREERBARE INJECTIELOGICA" I2L PAGES 82-91 *

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2417113A1 (fr) * 1978-02-14 1979-09-07 Motorola Inc Convertisseur differentiel a une sortie
FR2509102A1 (fr) * 1981-07-03 1983-01-07 Trt Telecom Radio Electr Commutateur analogique de courant en technologie bipolaire a injection
EP0070063A1 (fr) * 1981-07-03 1983-01-19 Telecommunications Radioelectriques Et Telephoniques T.R.T. Générateur de fonction utilisant des commutateurs analogiques de courant en technologie bipolaire à injection

Also Published As

Publication number Publication date
DE2627574B2 (de) 1980-09-18
NL7606935A (nl) 1977-01-03
DE2627574A1 (de) 1977-01-13
DE2627574C3 (de) 1982-09-23
JPS5628051B2 (fr) 1981-06-29
GB1555231A (en) 1979-11-07
JPS5220756A (en) 1977-02-16
IT1061814B (it) 1983-04-30
FR2316804B1 (fr) 1979-07-27
CA1085467A (fr) 1980-09-09
US4081822A (en) 1978-03-28

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Legal Events

Date Code Title Description
ST Notification of lapse